Lines Matching +full:0 +full:x7c00

14 #define PRPRICR5	0xFF800048 /* LMB */
15 #define PRPRICR5_D	0x2a
18 #define FPGA_NAND_CTL	0xB410020C
19 #define FPGA_NAND_RST	0x0008
20 #define FPGA_NAND_INIT	0x0000
24 #define PACR_D	0x0000
25 #define PBCR_D	0x0000
26 #define PCCR_D	0x1000
27 #define PDCR_D	0x0000
28 #define PECR_D	0x0410
29 #define PFCR_D	0xffff
30 #define PGCR_D	0x0000
31 #define PHCR_D	0x5011
32 #define PJCR_D	0x4400
33 #define PKCR_D	0x7c00
34 #define PLCR_D	0x0000
35 #define PMCR_D	0x0000
36 #define PNCR_D	0x0000
37 #define PQCR_D	0x0000
38 #define PRCR_D	0x0000
39 #define PSCR_D	0x0000
40 #define PTCR_D	0x0010
41 #define PUCR_D	0x0fff
42 #define PVCR_D	0xffff
43 #define PWCR_D	0x0000
44 #define PXCR_D	0x7500
45 #define PYCR_D	0x0000
46 #define PZCR_D	0x5540
49 #define PSELA_D	0x1410
50 #define PSELB_D	0x0140
51 #define PSELC_D	0x0000
52 #define PSELD_D	0x0400
55 #define	HIZCRA_D	0x0000
56 #define HIZCRB_D	0x1000
57 #define HIZCRC_D	0x0000
58 #define HIZCRD_D	0x0000
61 #define MSELCRA_D	0x0014
62 #define MSELCRB_D	0x0018
65 #define MSTPCR2_D	0xFFD9F280
73 	return 0;  in checkboard()
128 	return 0;  in board_init()
144 	int rc = 0;  in board_eth_init()
146 	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);  in board_eth_init()