quipos/cairo/cairo.h

38 MUX_VAL(CONTROL_PADCONF_CAM_D1, (IEN | DIS | SB_HIZ | M4)) \
39 MUX_VAL(CONTROL_PADCONF_CAM_D2, (IEN | DIS | SB_HIZ | M7)) \
43 MUX_VAL(CONTROL_PADCONF_CAM_D6, (IEN | PTD | EN | SB_HIZ | SB_PD | M7)) \
45 MUX_VAL(CONTROL_PADCONF_CAM_D8, (IEN | DIS | SB_HIZ | M7)) \
46 MUX_VAL(CONTROL_PADCONF_CAM_D9, (IEN | DIS | SB_HIZ | M4)) \
49 MUX_VAL(CONTROL_PADCONF_CAM_FLD, (IEN | DIS | SB_HIZ | M4)) \
56 MUX_VAL(CONTROL_PADCONF_CAM_XCLKB, (IEN | DIS | SB_HIZ | SB_PD | M7)) \
57 MUX_VAL(CONTROL_PADCONF_DSS_ACBIAS, (IDIS | PTD | EN | SB_HIZ | SB_PD | M0)) \
134 MUX_VAL(CONTROL_PADCONF_GPMC_NCS0, (IDIS | DIS | SB_HIZ | SB_PD | M0)) \
138 MUX_VAL(CONTROL_PADCONF_GPMC_NCS4, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
139 MUX_VAL(CONTROL_PADCONF_GPMC_NCS5, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
140 MUX_VAL(CONTROL_PADCONF_GPMC_NCS6, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
141 MUX_VAL(CONTROL_PADCONF_GPMC_NCS7, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
144 MUX_VAL(CONTROL_PADCONF_GPMC_NWP, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
145 MUX_VAL(CONTROL_PADCONF_GPMC_WAIT0, (IEN | DIS | SB_HIZ | M0)) \
149 MUX_VAL(CONTROL_PADCONF_HDQ_SIO, (IEN | DIS | SB_HIZ | M4)) \
162 MUX_VAL(CONTROL_PADCONF_I2C1_SCL, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
163 MUX_VAL(CONTROL_PADCONF_I2C1_SDA, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
164 MUX_VAL(CONTROL_PADCONF_I2C2_SCL, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
165 MUX_VAL(CONTROL_PADCONF_I2C2_SDA, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
180 MUX_VAL(CONTROL_PADCONF_MCBSP1_CLKX, (IEN | DIS | SB_HIZ | M4)) \
181 MUX_VAL(CONTROL_PADCONF_MCBSP1_DR, (IEN | DIS | SB_HIZ | M4)) \
182 MUX_VAL(CONTROL_PADCONF_MCBSP1_DX, (IEN | DIS | SB_HIZ | SB_PD | M7)) \
184 MUX_VAL(CONTROL_PADCONF_MCBSP1_FSX, (IEN | DIS | SB_HIZ | M4)) \
189 MUX_VAL(CONTROL_PADCONF_MCBSP3_CLKX, (IDIS | DIS | SB_HIZ | SB_PU | M1)) \
192 MUX_VAL(CONTROL_PADCONF_MCBSP3_FSX, (IEN | PTU | EN | SB_HIZ | SB_PU | M1)) \
198 MUX_VAL(CONTROL_PADCONF_MCSPI1_CS0, (IEN | PTU | EN | SB_HIZ | SB_PD | M0)) \
209 MUX_VAL(CONTROL_PADCONF_MMC1_CLK, (IDIS | PTU | EN | SB_HIZ | SB_PU | M0)) \
210 MUX_VAL(CONTROL_PADCONF_MMC1_CMD, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
211 MUX_VAL(CONTROL_PADCONF_MMC1_DAT0, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
212 MUX_VAL(CONTROL_PADCONF_MMC1_DAT1, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
213 MUX_VAL(CONTROL_PADCONF_MMC1_DAT2, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
214 MUX_VAL(CONTROL_PADCONF_MMC1_DAT3, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
215 MUX_VAL(CONTROL_PADCONF_MMC2_CLK, (IEN | PTD | EN | SB_HIZ | SB_PU | M0)) \
216 MUX_VAL(CONTROL_PADCONF_MMC2_CMD, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
217 MUX_VAL(CONTROL_PADCONF_MMC2_DAT0, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
218 MUX_VAL(CONTROL_PADCONF_MMC2_DAT1, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
219 MUX_VAL(CONTROL_PADCONF_MMC2_DAT2, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
220 MUX_VAL(CONTROL_PADCONF_MMC2_DAT3, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
221 MUX_VAL(CONTROL_PADCONF_MMC2_DAT4, (IDIS | DIS | SB_HIZ | M0)) \
222 MUX_VAL(CONTROL_PADCONF_MMC2_DAT5, (IDIS | DIS | SB_HIZ | M0)) \
223 MUX_VAL(CONTROL_PADCONF_MMC2_DAT6, (IDIS | DIS | SB_HIZ | M0)) \
224 MUX_VAL(CONTROL_PADCONF_MMC2_DAT7, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
305 MUX_VAL(CONTROL_PADCONF_UART1_CTS, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
306 MUX_VAL(CONTROL_PADCONF_UART1_RTS, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
307 MUX_VAL(CONTROL_PADCONF_UART1_RX, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
308 MUX_VAL(CONTROL_PADCONF_UART1_TX, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
314 	(IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
315 MUX_VAL(CONTROL_PADCONF_UART3_RTS_SD, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
316 MUX_VAL(CONTROL_PADCONF_UART3_RX_IRRX, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
317 MUX_VAL(CONTROL_PADCONF_UART3_TX_IRTX, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \