Lines Matching +full:0 +full:xfff3c200
15 #define HB_AHCI_BASE 0xffe08000
17 #define HB_SCU_A9_PWR_STATUS 0xfff10008
18 #define HB_SREG_A9_PWR_REQ 0xfff3cf00
19 #define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
20 #define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
21 #define HB_SREG_A15_PWR_CTRL 0xfff3c200
23 #define HB_PWR_SUSPEND 0
28 #define PWRDOM_STAT_SATA 0x80000000
29 #define PWRDOM_STAT_PCI 0x40000000
30 #define PWRDOM_STAT_EMMC 0x20000000
32 #define HB_SCU_A9_PWR_NORMAL 0
47 return 0; in board_init()
53 int rc = 0; in board_eth_init()
56 rc += calxedaxgmac_initialize(0, 0xfff50000); in board_eth_init()
57 rc += calxedaxgmac_initialize(1, 0xfff51000); in board_eth_init()
81 boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff; in misc_init_r()
89 return 0; in misc_init_r()
96 return 0; in dram_init()
113 return 0; in ft_board_setup()
121 asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr)); in is_highbank()
123 return (midr & 0xfff0) == 0xc090; in is_highbank()
132 writel(0x1, HB_SREG_A15_PWR_CTRL); in reset_cpu()