Lines Matching +full:4 +full:- +full:lane

4  * SPDX-License-Identifier:	GPL-2.0+
82 static void cphy_spread_spectrum_override(u8 phy, u8 lane, u32 val) in cphy_spread_spectrum_override() argument
85 tmp = combo_phy_read(phy, CPHY_RX_INPUT_STS + lane * SPHY_LANE); in cphy_spread_spectrum_override()
87 combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_spread_spectrum_override()
90 combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_spread_spectrum_override()
94 combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_spread_spectrum_override()
97 static void cphy_tx_attenuation_override(u8 phy, u8 lane) in cphy_tx_attenuation_override() argument
103 shift = ((phy == 5) ? 4 : lane) * 4; in cphy_tx_attenuation_override()
110 tmp = combo_phy_read(phy, CPHY_TX_INPUT_STS + lane * SPHY_LANE); in cphy_tx_attenuation_override()
112 combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_tx_attenuation_override()
115 combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_tx_attenuation_override()
118 combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_tx_attenuation_override()
124 u8 lane = 0, phy = 0; in cphy_disable_port_overrides() local
129 lane = port - 1; in cphy_disable_port_overrides()
132 tmp = combo_phy_read(phy, CPHY_RX_INPUT_STS + lane * SPHY_LANE); in cphy_disable_port_overrides()
134 combo_phy_write(phy, CPHY_RX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_disable_port_overrides()
136 tmp = combo_phy_read(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE); in cphy_disable_port_overrides()
138 combo_phy_write(phy, CPHY_TX_INPUT_OVERRIDE + lane * SPHY_LANE, tmp); in cphy_disable_port_overrides()
156 u8 lane = 0, phy = 0; in cphy_override_lane() local
161 lane = port - 1; in cphy_override_lane()
167 lane * SPHY_LANE); in cphy_override_lane()
169 cphy_spread_spectrum_override(phy, lane, 3); in cphy_override_lane()
170 cphy_tx_attenuation_override(phy, lane); in cphy_override_lane()
173 #define WAIT_MS_LINKUP 4
179 u8 *port_mmio = (u8 *)probe_ent->port[port].port_mmio; in ahci_link_up()
185 * rarely has it taken between 1-2 ms. Never seen it above 2 ms. in ahci_link_up()