Lines Matching refs:QIXIS_READ
39 sw = QIXIS_READ(arch); in checkboard()
40 printf("Sys ID: 0x%02x, Board Arch: V%d, ", QIXIS_READ(id), sw >> 4); in checkboard()
48 sw = QIXIS_READ(brdcfg[0]); in checkboard()
61 printf("FPGA: v%d (%s), build %d", (int)QIXIS_READ(scver), in checkboard()
67 sw = QIXIS_READ(brdcfg[2]); in checkboard()
359 QIXIS_WRITE(brdcfg[5], QIXIS_READ(brdcfg[5]) & ~BRDCFG5_IRE); in board_early_init_r()
376 u8 sysclk_conf = QIXIS_READ(brdcfg[1]); in get_board_sys_clk()
379 int freq = QIXIS_READ(clk_freq[0]) << 8 | QIXIS_READ(clk_freq[1]); in get_board_sys_clk()
380 int base = QIXIS_READ(clk_base[0]) << 8 | QIXIS_READ(clk_base[1]); in get_board_sys_clk()
414 u8 ddrclk_conf = QIXIS_READ(brdcfg[1]); in get_board_ddr_clk()
417 int freq = QIXIS_READ(clk_freq[2]) << 8 | QIXIS_READ(clk_freq[3]); in get_board_ddr_clk()
418 int base = QIXIS_READ(clk_base[0]) << 8 | QIXIS_READ(clk_base[1]); in get_board_ddr_clk()