Lines Matching full:sd2
278 /* SD2(A:H) => SLOT4 PCIe1 */ in brd_mux_lane_to_slot()
284 * SD2(A:D) => SLOT4 PCIe1 in brd_mux_lane_to_slot()
285 * SD2(E:F) => SLOT5 PCIe2 in brd_mux_lane_to_slot()
286 * SD2(G:H) => SATA1,SATA2 in brd_mux_lane_to_slot()
292 * SD2(A:D) => SLOT4 PCIe1 in brd_mux_lane_to_slot()
293 * SD2(E:F) => SLOT5 Aurora in brd_mux_lane_to_slot()
294 * SD2(G:H) => SATA1,SATA2 in brd_mux_lane_to_slot()
300 * SD2(A:D) => SLOT4 PCIe1 in brd_mux_lane_to_slot()
301 * SD2(E:H) => SLOT5 PCIe2 in brd_mux_lane_to_slot()
309 * SD2(A:D) => SLOT4 SRIO2 in brd_mux_lane_to_slot()
310 * SD2(E:H) => SLOT5 SRIO1 in brd_mux_lane_to_slot()
316 * SD2(A:D) => SLOT4 SRIO2 in brd_mux_lane_to_slot()
317 * SD2(E:F) => Aurora in brd_mux_lane_to_slot()
318 * SD2(G:H) => SATA1,SATA2 in brd_mux_lane_to_slot()