Lines Matching refs:lane
300 int lane = serdes_get_first_lane(FSL_SRDS_1, SGMII_FM1_DTSEC1 in board_ft_fman_fixup_port() local
303 if (lane < 0) in board_ft_fman_fixup_port()
305 slot = lane_to_slot[lane]; in board_ft_fman_fixup_port()
318 int i, lane, idx; in fdt_fixup_board_enet() local
324 lane = serdes_get_first_lane(FSL_SRDS_1, in fdt_fixup_board_enet()
326 if (lane < 0) in fdt_fixup_board_enet()
370 int lane, idx, slot; in t1040_handle_phy_interface_sgmii() local
372 lane = serdes_get_first_lane(FSL_SRDS_1, in t1040_handle_phy_interface_sgmii()
375 if (lane < 0) in t1040_handle_phy_interface_sgmii()
377 slot = lane_to_slot[lane]; in t1040_handle_phy_interface_sgmii()
444 int lane; in board_eth_init() local
505 lane = -1; in board_eth_init()
513 lane = serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_A); in board_eth_init()
515 if (lane >= 0) { in board_eth_init()
521 lane = serdes_get_first_lane(FSL_SRDS_1, in board_eth_init()
524 if (lane < 0) in board_eth_init()
528 if (i != 3 || lane_to_slot[lane] == 7) in board_eth_init()
539 lane = serdes_get_first_lane(FSL_SRDS_1, QSGMII_SW1_B); in board_eth_init()
541 if (lane >= 0) { in board_eth_init()
547 lane = serdes_get_first_lane(FSL_SRDS_1, in board_eth_init()
550 if (lane >= 0) { in board_eth_init()
577 if (lane >= 0) { in board_eth_init()
578 bus = mii_dev_for_muxval(lane_to_slot[lane]); in board_eth_init()