4  * SPDX-License-Identifier:	GPL-2.0+
31 	struct cpu_type *cpu = gd->arch.cpu;  in checkboard()
36 	printf("Board: %sQDS, ", cpu->name);  in checkboard()
38 	printf("Board Version: %c, boot from ", (sw & 0xf) + 'A' - 1);  in checkboard()
80 	ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);  in select_i2c_ch_pca9547()
95 	srds_prtcl_s1 = in_be32(&gur->rcwsr[4]) &  in board_mux_lane_to_slot()
149 		return -1;  in board_mux_lane_to_slot()
181 	if (hwconfig_arg_cmp("adaptor", "sdxc"))  in board_mux_setup()
194 	i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &reg, 1);  in board_retimer_ds125df111_init()
196 	i2c_write(I2C_MUX_PCA_ADDR_SEC, 0, 1, &reg, 1);  in board_retimer_ds125df111_init()
200 	i2c_write(I2C_RETIMER_ADDR, 0xff, 1, &reg, 1);  in board_retimer_ds125df111_init()
203 	i2c_read(I2C_RETIMER_ADDR, 1, 1, &reg, 1);  in board_retimer_ds125df111_init()
208 	i2c_write(I2C_RETIMER_ADDR, 0xff, 1, &reg, 1);  in board_retimer_ds125df111_init()
211 	i2c_read(I2C_RETIMER_ADDR, 0, 1, &reg, 1);  in board_retimer_ds125df111_init()
213 	i2c_write(I2C_RETIMER_ADDR, 0, 1, &reg, 1);  in board_retimer_ds125df111_init()
216 	i2c_read(I2C_RETIMER_ADDR, 9, 1, &reg, 1);  in board_retimer_ds125df111_init()
218 	i2c_write(I2C_RETIMER_ADDR, 9, 1, &reg, 1);  in board_retimer_ds125df111_init()
221 	i2c_read(I2C_RETIMER_ADDR, 0x18, 1, &reg, 1);  in board_retimer_ds125df111_init()
223 	i2c_write(I2C_RETIMER_ADDR, 0x18, 1, &reg, 1);  in board_retimer_ds125df111_init()
225 	/* Select active PFD MUX input as re-timed data (001) */  in board_retimer_ds125df111_init()
226 	i2c_read(I2C_RETIMER_ADDR, 0x1e, 1, &reg, 1);  in board_retimer_ds125df111_init()
229 	i2c_write(I2C_RETIMER_ADDR, 0x1e, 1, &reg, 1);  in board_retimer_ds125df111_init()
233 	i2c_write(I2C_RETIMER_ADDR, 0x60, 1, &reg, 1);  in board_retimer_ds125df111_init()
235 	i2c_write(I2C_RETIMER_ADDR, 0x61, 1, &reg, 1);  in board_retimer_ds125df111_init()
237 	i2c_write(I2C_RETIMER_ADDR, 0x62, 1, &reg, 1);  in board_retimer_ds125df111_init()
239 	i2c_write(I2C_RETIMER_ADDR, 0x63, 1, &reg, 1);  in board_retimer_ds125df111_init()
241 	i2c_write(I2C_RETIMER_ADDR, 0x64, 1, &reg, 1);  in board_retimer_ds125df111_init()
258 	int flash_esel = find_tlb_idx((void *)flashbase, 1);  in board_early_init_r()
261 	 * Remap Boot flash + PROMJET region to caching-inhibited  in board_early_init_r()
265 	/* Flush d-cache and invalidate i-cache of any FLASH data */  in board_early_init_r()
269 	if (flash_esel == -1) {  in board_early_init_r()
278 	set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,  in board_early_init_r()
280 		0, flash_esel, BOOKE_PAGESZ_256M, 1);  in board_early_init_r()
294 	u8 sysclk_conf = QIXIS_READ(brdcfg[1]);  in get_board_sys_clk()
319 	u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);  in get_board_ddr_clk()
395 	nr_of_cfgsw = QIXIS_READ(cms[1]);  in qixis_dump_switch()
398 	for (i = 1; i <= nr_of_cfgsw; i++) {  in qixis_dump_switch()
400 		printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1]));  in qixis_dump_switch()