Lines Matching +full:write +full:- +full:protect
4 with high-performance datapath acceleration architecture(DPAA), CoreNet
19 => tftp 1000000 u-boot.bin
20 => protect off all
26 => protect off all
32 => protect off all
36 5. Change DIP-switch
37 SW1[1-5] = 10110
48 SDCard which contains RCW and U-Boot image.
53 => mmc write 1000000 8 672
57 => mmc write 1000000 690 10
59 5. Change DIP-switch
60 SW1[1-5] = 01100
71 SPI flash which contains RCW and U-Boot image.
77 => sf write 1000000 0 $filesize
82 => sf write 1000000 110000 $filesize
84 5. Change DIP-switch
85 SW1[1-5] = 10100
93 cpld reset - hard reset to default bank
94 cpld reset altbank - reset to alternate bank
95 cpld lane_mux <lane> <mux_value> - set multiplexed lane pin
96 lane 6: 0 -> slot1 (Default)
97 1 -> SGMII
98 lane a: 0 -> slot2 (Default)
99 1 -> AURORA
100 lane c: 0 -> slot2 (Default)
101 1 -> SATA0
102 lane d: 0 -> slot2 (Default)
103 1 -> SATA1
109 dtc -O dtb -b 0 -p 1024 p2041rdb.dts > p2041rdb.dtb
112 {linux-2.6}/make p2041rdb.dtb ARCH=powerpc
115 {linux-2.6}/arch/powerpc/boot/p2041rdb.dtb