freescale/mx6sxsabreauto/mx6sxsabreauto.c

6  * SPDX-License-Identifier:	GPL-2.0+
12 #include <asm/arch/imx-regs.h>
13 #include <asm/arch/mx6-pins.h>
16 #include <asm/mach-imx/iomux-v3.h>
17 #include <asm/mach-imx/boot_mode.h>
28 #include <usb/ehci-ci.h>
54 	gd->ram_size = imx_ddr_size();  in dram_init()
90 	/* Use 125MHz anatop loopback REF_CLK1 for ENET2 */  in setup_fec()
91 	clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, 0);  in setup_fec()
115 	 * Phy control debug reg 0  in board_phy_config()
124 	if (phydev->drv->config)  in board_phy_config()
125 		phydev->drv->config(phydev);  in board_phy_config()
136 	u32 offset = PFUZE100_SW1CMODE;  in power_init_board()  local
139 	if (ret == -ENODEV)  in power_init_board()
153 	for (i = 0; i < switch_num - 1; i++)  in power_init_board()
154 		pmic_reg_write(dev, offset + i * SWITCH_SIZE, APS_PFM);  in power_init_board()
202 		return -EINVAL;  in board_ehci_hcd_init()
286 	setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);  in setup_gpmi_nand()
296 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;  in board_init()