Lines Matching refs:EMI1_SLOT5
73 #define EMI1_SLOT5 4 macro
559 lane_to_slot_fsm2[1] = EMI1_SLOT5; in initialize_dpmac_to_slot()
560 lane_to_slot_fsm2[2] = EMI1_SLOT5; in initialize_dpmac_to_slot()
561 lane_to_slot_fsm2[3] = EMI1_SLOT5; in initialize_dpmac_to_slot()
565 lane_to_slot_fsm2[5] = EMI1_SLOT5; in initialize_dpmac_to_slot()
566 lane_to_slot_fsm2[6] = EMI1_SLOT5; in initialize_dpmac_to_slot()
567 lane_to_slot_fsm2[7] = EMI1_SLOT5; in initialize_dpmac_to_slot()
582 lane_to_slot_fsm2[6] = EMI1_SLOT5; in initialize_dpmac_to_slot()
583 lane_to_slot_fsm2[7] = EMI1_SLOT5; in initialize_dpmac_to_slot()
715 dpmac_info[dpmac_id].board_mux = EMI1_SLOT5; in ls2080a_handle_phy_interface_sgmii()
716 bus = mii_dev_for_muxval(EMI1_SLOT5); in ls2080a_handle_phy_interface_sgmii()
881 ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT5); in board_eth_init()