Lines Matching refs:EMI1_SLOT1
69 #define EMI1_SLOT1 0 macro
460 lane_to_slot_fsm1[0] = EMI1_SLOT1; in initialize_dpmac_to_slot()
461 lane_to_slot_fsm1[1] = EMI1_SLOT1; in initialize_dpmac_to_slot()
462 lane_to_slot_fsm1[2] = EMI1_SLOT1; in initialize_dpmac_to_slot()
463 lane_to_slot_fsm1[3] = EMI1_SLOT1; in initialize_dpmac_to_slot()
465 lane_to_slot_fsm1[4] = EMI1_SLOT1; in initialize_dpmac_to_slot()
466 lane_to_slot_fsm1[5] = EMI1_SLOT1; in initialize_dpmac_to_slot()
467 lane_to_slot_fsm1[6] = EMI1_SLOT1; in initialize_dpmac_to_slot()
468 lane_to_slot_fsm1[7] = EMI1_SLOT1; in initialize_dpmac_to_slot()
629 dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; in ls2080a_handle_phy_interface_sgmii()
630 bus = mii_dev_for_muxval(EMI1_SLOT1); in ls2080a_handle_phy_interface_sgmii()
780 dpmac_info[dpmac_id].board_mux = EMI1_SLOT1; in ls2080a_handle_phy_interface_qsgmii()
781 bus = mii_dev_for_muxval(EMI1_SLOT1); in ls2080a_handle_phy_interface_qsgmii()
877 ls2080a_qds_mdio_init(DEFAULT_WRIOP_MDIO1_NAME, EMI1_SLOT1); in board_eth_init()