4  * SPDX-License-Identifier:	GPL-2.0+
96 	struct ls1043aqds_mdio *priv = bus->priv;  in ls1043aqds_mdio_read()
98 	ls1043aqds_mux_mdio(priv->muxval);  in ls1043aqds_mdio_read()
100 	return priv->realbus->read(priv->realbus, addr, devad, regnum);  in ls1043aqds_mdio_read()
106 	struct ls1043aqds_mdio *priv = bus->priv;  in ls1043aqds_mdio_write()
108 	ls1043aqds_mux_mdio(priv->muxval);  in ls1043aqds_mdio_write()
110 	return priv->realbus->write(priv->realbus, addr, devad,  in ls1043aqds_mdio_write()
116 	struct ls1043aqds_mdio *priv = bus->priv;  in ls1043aqds_mdio_reset()
118 	return priv->realbus->reset(priv->realbus);  in ls1043aqds_mdio_reset()
128 		return -1;  in ls1043aqds_mdio_init()
135 		return -1;  in ls1043aqds_mdio_init()
138 	bus->read = ls1043aqds_mdio_read;  in ls1043aqds_mdio_init()
139 	bus->write = ls1043aqds_mdio_write;  in ls1043aqds_mdio_init()
140 	bus->reset = ls1043aqds_mdio_reset;  in ls1043aqds_mdio_init()
141 	strcpy(bus->name, ls1043aqds_mdio_name_for_muxval(muxval));  in ls1043aqds_mdio_init()
143 	pmdio->realbus = miiphy_get_dev_by_name(realbusname);  in ls1043aqds_mdio_init()
145 	if (!pmdio->realbus) {  in ls1043aqds_mdio_init()
149 		return -1;  in ls1043aqds_mdio_init()
152 	pmdio->muxval = muxval;  in ls1043aqds_mdio_init()
153 	bus->priv = pmdio;  in ls1043aqds_mdio_init()
185 		fdt_delprop(fdt, offset, "phy-handle");  in board_ft_fman_fixup_port()
186 		fdt_setprop(fdt, offset, "fixed-link", &f_link, sizeof(f_link));  in board_ft_fman_fixup_port()
187 		fdt_setprop_string(fdt, offset, "phy-connection-type",  in board_ft_fman_fixup_port()
188 				   "sgmii-2500");  in board_ft_fman_fixup_port()
238 		fdt_delprop(fdt, offset, "phy-connection-type");  in board_ft_fman_fixup_port()
239 		fdt_setprop_string(fdt, offset, "phy-connection-type",  in board_ft_fman_fixup_port()
250 		fdt_delprop(fdt, offset, "phy-handle");  in board_ft_fman_fixup_port()
251 		fdt_setprop(fdt, offset, "fixed-link", &f_link, sizeof(f_link));  in board_ft_fman_fixup_port()
252 		fdt_setprop_string(fdt, offset, "phy-connection-type", "xgmii");  in board_ft_fman_fixup_port()
262 	srds_s1 = in_be32(&gur->rcwsr[4]) &  in fdt_fixup_board_enet()
298 	int i, idx, lane, slot, interface;  in board_eth_init()  local
304 	srds_s1 = in_be32(&gur->rcwsr[4]) &  in board_eth_init()
327 	/* Register the muxing front-ends to the MDIO buses */  in board_eth_init()
336 	/* Set the two on-board RGMII PHY address */  in board_eth_init()
342 		/* 2.5G SGMII on lane A, MAC 9 */  in board_eth_init()
347 		/* QSGMII on lane A, MAC 1/2/5/6 */  in board_eth_init()
358 		/* SGMII on lane B, MAC 2*/  in board_eth_init()
362 		/* 2.5G SGMII on lane A, MAC 9 */  in board_eth_init()
364 		/* SGMII on lane B, MAC 2*/  in board_eth_init()
368 		/* SGMII on lane C, MAC 5 */  in board_eth_init()
372 		/* SGMII on lane B, MAC 2 */  in board_eth_init()
376 		/* SGMII on lane A, MAC 9 */  in board_eth_init()
380 		/* QSGMII on lane B, MAC 1/2/5/6 */  in board_eth_init()
391 		/* 2.5G SGMII on lane A, MAC 9 */  in board_eth_init()
393 		/* QSGMII on lane B, MAC 1/2/5/6 */  in board_eth_init()
404 		/* 2.5G SGMII on lane A, MAC 9 */  in board_eth_init()
406 		/* 2.5G SGMII on lane B, MAC 2 */  in board_eth_init()
410 		/* SGMII on lane A/B/C/D, MAC 9/2/5/6 */  in board_eth_init()
427 		idx = i - FM1_DTSEC1;  in board_eth_init()
434 				lane = serdes_get_first_lane(FSL_SRDS_1,  in board_eth_init()
437 				lane = serdes_get_first_lane(FSL_SRDS_1,  in board_eth_init()
440 				lane = serdes_get_first_lane(FSL_SRDS_1,  in board_eth_init()
444 			if (lane < 0)  in board_eth_init()
447 			slot = lane_to_slot[lane];  in board_eth_init()
450 			if (QIXIS_READ(present2) & (1 << (slot - 1)))  in board_eth_init()