13 #define pixis_base (u8 *)PIXIS_BASE  macro
20 	out_8(pixis_base + PIXIS_RST, 0);  in pixis_reset()
89 	out_8(pixis_base + PIXIS_VCLKH, vclkh);  in set_px_sysclk()
90 	out_8(pixis_base + PIXIS_VCLKL, vclkl);  in set_px_sysclk()
92 	out_8(pixis_base + PIXIS_AUX, sysclk_aux);  in set_px_sysclk()
113 		clrsetbits_8(pixis_base + PIXIS_VSPEED1, 0x1F, mpxpll);  in set_px_mpxpll()
149 	clrsetbits_8(pixis_base + PIXIS_VSPEED0, 0x1F, val);  in set_px_corepll()
168 	u8 tmp = in_8(pixis_base + PIXIS_VCFGEN0);  in read_from_px_regs()
175 	out_8(pixis_base + PIXIS_VCFGEN0, tmp);  in read_from_px_regs()
195 	u8 tmp = in_8(pixis_base + PIXIS_VCFGEN1);  in read_from_px_regs_altbank()
202 	out_8(pixis_base + PIXIS_VCFGEN1, tmp);  in read_from_px_regs_altbank()
224 	clrbits_8(pixis_base + PIXIS_VBOOT, CONFIG_SYS_PIXIS_VBOOT_MASK);  in clear_altbank()
234 	setbits_8(pixis_base + PIXIS_VBOOT, CONFIG_SYS_PIXIS_VBOOT_MASK);  in set_altbank()
244 	clrbits_8(pixis_base + PIXIS_VCTL, 9);  in set_px_go()
247 	setbits_8(pixis_base + PIXIS_VCTL, 0x1);  in set_px_go()
259 	clrbits_8(pixis_base + PIXIS_VCTL, 1);  in set_px_go_with_watchdog()
262 	setbits_8(pixis_base + PIXIS_VCTL, 0x9);  in set_px_go_with_watchdog()
274 	clrbits_8(pixis_base + PIXIS_VCTL, 9);  in pixis_disable_watchdog_cmd()
331 		clrbits_8(pixis_base + PIXIS_VCFGEN1, switch_mask);  in pixis_set_sgmii()
333 		setbits_8(pixis_base + PIXIS_VCFGEN1, switch_mask);  in pixis_set_sgmii()
337 		clrbits_8(pixis_base + PIXIS_VSPEED2, mask);  in pixis_set_sgmii()
339 		setbits_8(pixis_base + PIXIS_VSPEED2, mask);  in pixis_set_sgmii()