Lines Matching +full:100 +full:mhz

23       ECC), up to 1333 MHz data rate
73 Core MHz/CCB MHz/DDR(MT/s)
74 1. CPU0/CPU1/CCB/DDR: 1000MHz/1000MHz/500MHz/800MHz
75      (SYSCLK = 100MHz, DDRCLK = 100MHz)
76 2. CPU0/CPU1/CCB/DDR: 1200MHz/1200MHz/600MHz/1330MHz
77      (SYSCLK = 100MHz, DDRCLK = 133MHz)
94 	make BSC9132QDS_NOR_DDRCLK100 : For 100MHZ DDR CLK
95 	make BSC9132QDS_NOR_DDRCLK133 : For 133MHZ DDR CLK
98 	make BSC9132QDS_SPIFLASH_DDRCLK100 : For 100MHZ DDR CLK
99 	make BSC9132QDS_SPIFLASH_DDRCLK133 : For 133MHZ DDR CLK
101 	make BSC9132QDS_SDCARD_DDRCLK100 : For 100MHZ DDR CLK
102 	make BSC9132QDS_SDCARD_DDRCLK133 : For 133MHZ DDR CLK