Lines Matching +full:cache +full:- +full:controller +full:- +full:0
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3 - BSC9131 is integrated device that targets Femto base station market.
5 technologies with MAPLE-B2F baseband acceleration processing elements.
6 - It's MAPLE disabled personality is called 9231.
9 . Power Architecture subsystem including a e500 processor with 256-Kbyte shared
10 L2 cache
11 . StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache
13 Processing (MAPLE-B2F)
14 . A multi-standard baseband algorithm accelerator for Channel Decoding/Encoding,
20 . DDR3/3L memory interface with 32-bit data width without ECC and 16-bit with
21 ECC, up to 400-MHz clock/800 MHz data rate
23 . DMA controller
26 . Two triple-speed Gigabit Ethernet controllers featuring network acceleration
30 . High-speed USB 2.0 host and device controller with ULPI interface
31 . Enhanced secure digital (SD/MMC) host controller (eSDHC)
32 . Antenna interface controller (AIC), supporting three industry standard
37 communication to SIM cards or Eurochip pre-paid phone cards
40 . Integrated Flash memory controller (IFC)
43 . Sixteen 32-bit timers
46 . 32-Kbyte L1 instruction cache
47 . 32-Kbyte L1 data cache
48 . 256-Kbyte L2 cache/L2 memory/L2 stash
49 . programmable interrupt controller (PIC)
54 . 32 Kbyte 8-way level 1 instruction cache (L1 ICache)
55 . 32 Kbyte 8-way level 1 data cache (L1 DCache)
56 . 512 Kbyte 8-way level 2 unified instruction/data cache (M2 memory)
58 . Enhanced programmable interrupt controller (EPIC)
60 . Two 32-bit timers
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68 USB-ULPI
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81 -----------------------
86 --------------------
89 Building U-Boot
90 --------------
91 To build the U-Boot for BSC9131RDB:
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103 0x0000_0000 0x7FFF_FFFF DDR 1G cacheable
104 0xA0000000 0xBFFFFFFF Shared DSP core L2/M2 space 512M
105 0xC100_0000 0xC13F_FFFF MAPLE-2F 4M
106 0xC1F0_0000 0xC1F3_FFFF PA SRAM Region 0 256K
107 0xC1F8_0000 0xC1F9_FFFF PA SRAM Region 1 128K
108 0xFED0_0000 0xFED0_3FFF SEC Secured RAM 16K
109 0xFEE0_0000 0xFEE0_0FFF DSP Boot ROM 4K
110 0xFF60_0000 0xFF6F_FFFF DSP CCSR 1M
111 0xFF70_0000 0xFF7F_FFFF PA CCSR 1M
112 0xFF80_0000 0xFFFF_FFFF Boot Page & NAND Buffer 8M
115 ---------------
116 0x0000_0000 0x36FF_FFFF Memory passed onto Linux
117 0x3700_0000 0x37FF_FFFF PowerPC-DSP shared control area
118 0x3800_0000 0x4FFF_FFFF DSP Private area
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126 To place a new U-Boot image in the NAND flash and then boot
128 tftp 1000000 u-boot-nand.bin
129 nand erase 0 100000
130 nand write 1000000 0 100000
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138 dtc -b 0 -f -I dts -O dtb bsc9131rdb.dts > bsc9131rdb.dtb
142 linux-2.6/arch/powerpc/boot/dts/bsc9131rdb.dts
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