Lines Matching refs:setbits_be32
611 setbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
613 setbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
646 setbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
660 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
672 setbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
683 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
687 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
718 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
734 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
796 setbits_be32(&gur->rstrqmr1, FSL_CORENET_RSTRQMR1_SRDS_RST_MSK); in config_serdes1_refclks()
883 setbits_be32(&srds_regs->bank[i].rstctl, in config_serdes1_refclks()
885 setbits_be32(&srds_regs->bank[i].rstctl, in config_serdes1_refclks()
926 setbits_be32(&gur->rstrqmr1, FSL_CORENET_RSTRQMR1_SRDS_RST_MSK); in config_serdes2_refclks()
967 setbits_be32(&srds2_regs->bank[i].rstctl, in config_serdes2_refclks()
969 setbits_be32(&srds2_regs->bank[i].rstctl, in config_serdes2_refclks()