Lines Matching refs:pll_num
597 static int calibrate_pll(serdes_corenet_t *srds_regs, int pll_num) in calibrate_pll() argument
604 debug("CALIBRATE PLL:%d\n", pll_num); in calibrate_pll()
605 clrbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
608 clrbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
611 setbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
613 setbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
620 rst_err = in_be32(&srds_regs->bank[pll_num].rstctl) & in calibrate_pll()
623 debug("RST_ERR value for PLL %d is: 0x%x:\n", pll_num, rst_err); in calibrate_pll()
630 static int check_pll_locks(serdes_corenet_t *srds_regs, int pll_num) in check_pll_locks() argument
635 if (calibrate_pll(srds_regs, pll_num)) { in check_pll_locks()
638 clrbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
640 fcap = in_be32(&srds_regs->bank[pll_num].pllsr2) & in check_pll_locks()
643 bcap = in_be32(&srds_regs->bank[pll_num].pllsr2) & in check_pll_locks()
646 setbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
648 dcbias = in_be32(&srds_regs->bank[pll_num].pllsr2) & in check_pll_locks()
655 clrbits_be32(&srds_regs->bank[pll_num].rstctl, in check_pll_locks()
658 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
660 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
662 if (calibrate_pll(srds_regs, pll_num)) { in check_pll_locks()
664 clrbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
666 fcap = in_be32(&srds_regs->bank[pll_num].pllsr2) in check_pll_locks()
669 bcap = in_be32(&srds_regs->bank[pll_num].pllsr2) in check_pll_locks()
672 setbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
675 (&srds_regs->bank[pll_num].pllsr2) & in check_pll_locks()
680 clrbits_be32(&srds_regs->bank[pll_num].rstctl, in check_pll_locks()
683 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
685 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
687 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
691 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
694 (&srds_regs->bank[pll_num].pllcr1)| in check_pll_locks()
696 out_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
698 clrbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
701 (&srds_regs->bank[pll_num].pllcr0)| in check_pll_locks()
703 out_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
705 ret = calibrate_pll(srds_regs, pll_num); in check_pll_locks()
712 clrbits_be32(&srds_regs->bank[pll_num].rstctl, in check_pll_locks()
718 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
720 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
722 pllcr1 = (in_be32(&srds_regs->bank[pll_num].pllcr1)| in check_pll_locks()
724 out_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
726 clrbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
728 pllcr0 = (in_be32(&srds_regs->bank[pll_num].pllcr0)| in check_pll_locks()
730 out_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
732 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
734 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
736 ret = calibrate_pll(srds_regs, pll_num); in check_pll_locks()