2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
9  * SPDX-License-Identifier:	GPL-2.0+
19 #include <asm/ti-common/davinci_nand.h>
22 #include <asm/mach-types.h>
31 #define pinmux(x)	(&davinci_syscfg_regs->pinmux[x])  macro
37 	{ pinmux(0),  8, 4 },	/* GP0[11] */
38 	{ pinmux(10), 2, 0 },	/* MMCSD0_CLK */
39 	{ pinmux(10), 2, 1 },	/* MMCSD0_CMD */
40 	{ pinmux(10), 2, 2 },	/* MMCSD0_DAT_0 */
41 	{ pinmux(10), 2, 3 },	/* MMCSD0_DAT_1 */
42 	{ pinmux(10), 2, 4 },	/* MMCSD0_DAT_2 */
43 	{ pinmux(10), 2, 5 },	/* MMCSD0_DAT_3 */
44 	/* LCDK supports only 4-bit mode, remaining pins are not configured */
50 	{ pinmux(0), 4, 6 },
51 	{ pinmux(0), 4, 7 },
52 	{ pinmux(4), 2, 4 },
53 	{ pinmux(4), 2, 5 }
58 	{ pinmux(2), 8, 1 },
59 	{ pinmux(2), 8, 2 },
60 	{ pinmux(2), 8, 3 },
61 	{ pinmux(2), 8, 4 },
62 	{ pinmux(2), 8, 5 },
63 	{ pinmux(2), 8, 6 },
64 	{ pinmux(2), 8, 7 },
65 	{ pinmux(3), 8, 0 },
66 	{ pinmux(3), 8, 1 },
67 	{ pinmux(3), 8, 2 },
68 	{ pinmux(3), 8, 3 },
69 	{ pinmux(3), 8, 4 },
70 	{ pinmux(3), 8, 5 },
71 	{ pinmux(3), 8, 6 },
72 	{ pinmux(3), 8, 7 },
73 	{ pinmux(4), 8, 0 },
74 	{ pinmux(4), 8, 1 }
80 	{ pinmux(4), 2, 2 },
81 	{ pinmux(4), 2, 3 }
86 	{ pinmux(7), 1, 1 },
87 	{ pinmux(7), 1, 2 },
88 	{ pinmux(7), 1, 4 },
89 	{ pinmux(7), 1, 5 },
90 	{ pinmux(8), 1, 0 },
91 	{ pinmux(8), 1, 1 },
92 	{ pinmux(8), 1, 2 },
93 	{ pinmux(8), 1, 3 },
94 	{ pinmux(8), 1, 4 },
95 	{ pinmux(8), 1, 5 },
96 	{ pinmux(8), 1, 6 },
97 	{ pinmux(8), 1, 7 },
98 	{ pinmux(9), 1, 0 },
99 	{ pinmux(9), 1, 1 },
100 	{ pinmux(9), 1, 2 },
101 	{ pinmux(9), 1, 3 },
102 	{ pinmux(9), 1, 4 },
103 	{ pinmux(9), 1, 5 },
104 	{ pinmux(9), 1, 6 },
105 	{ pinmux(9), 1, 7 },
106 	{ pinmux(12), 1, 5 },
107 	{ pinmux(12), 1, 6 }
146  * get_board_rev() - setup to pass kernel board revision information
148  * bit[0-3]	Maximum cpu clock rate supported by onboard SoC
149  *		0000b - 300 MHz
150  *		0001b - 372 MHz
151  *		0010b - 408 MHz
152  *		0011b - 456 MHz
178 	gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_LCDK;  in board_init()
181 	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;  in board_init()
185 	writel(readl(&davinci_syscfg_regs->suspsrc) &  in board_init()
189 	       &davinci_syscfg_regs->suspsrc);  in board_init()
191 	/* configure pinmux settings */  in board_init()
197 	 * NAND CS setup - cycle counts based on da850evm NAND timings in the  in board_init()
208 	       &davinci_emif_regs->ab2cr); /* CS3 */  in board_init()
226 	       &davinci_uart2_ctrl_regs->pwremu_mgmt);  in board_init()
234  * Initializes on-board ethernet controllers.
240 		return -1;  in board_eth_init()
253 #define CFG_MAC_ADDR_OFFSET	(flash->size - SZ_64K)
261 void dsp_lpsc_on(unsigned domain, unsigned int id)  in dsp_lpsc_on()  argument
267 	mdstat = &psc_regs->psc0.mdstat[id];  in dsp_lpsc_on()
268 	mdctl = &psc_regs->psc0.mdctl[id];  in dsp_lpsc_on()
269 	ptstat = &psc_regs->ptstat;  in dsp_lpsc_on()
270 	ptcmd = &psc_regs->ptcmd;  in dsp_lpsc_on()
360 	.host_caps = MMC_MODE_4BIT,     /* DA850 supports only 4-bit SD/MMC */
369 	/* Add slot-0 to mmc subsystem */  in board_mmc_init()