Lines Matching +full:0 +full:x00000028
15 /* SDCLK[0:1], CAS, RAS, Reset: Differential input, 48ohm */
16 .dram_sdclk_0 = 0x00000028,
17 .dram_sdclk_1 = 0x00000028,
18 .dram_cas = 0x00000028,
19 .dram_ras = 0x00000028,
20 .dram_reset = 0x00000028,
21 /* SDCKE[0:1]: 100k pull-up */
22 .dram_sdcke0 = 0x00003000,
23 .dram_sdcke1 = 0x00003000,
25 .dram_sdba2 = 0x00000000,
26 /* SDODT[0:1]: 100k pull-up, 48 ohm */
27 .dram_sdodt0 = 0x00000028,
28 .dram_sdodt1 = 0x00000028,
29 /* SDQS[0:7]: Differential input, 48 ohm */
30 .dram_sdqs0 = 0x00000028,
31 .dram_sdqs1 = 0x00000028,
32 .dram_sdqs2 = 0x00000028,
33 .dram_sdqs3 = 0x00000028,
34 .dram_sdqs4 = 0x00000028,
35 .dram_sdqs5 = 0x00000028,
36 .dram_sdqs6 = 0x00000028,
37 .dram_sdqs7 = 0x00000028,
38 /* DQM[0:7]: Differential input, 48 ohm */
39 .dram_dqm0 = 0x00000028,
40 .dram_dqm1 = 0x00000028,
41 .dram_dqm2 = 0x00000028,
42 .dram_dqm3 = 0x00000028,
43 .dram_dqm4 = 0x00000028,
44 .dram_dqm5 = 0x00000028,
45 .dram_dqm6 = 0x00000028,
46 .dram_dqm7 = 0x00000028,
52 .grp_ddr_type = 0x000c0000,
53 .grp_ddrmode_ctl = 0x00020000,
55 .grp_ddrpke = 0x00000000,
56 /* ADDR[00:16], SDBA[0:1]: 48 ohm */
57 .grp_addds = 0x00000028,
59 .grp_ctlds = 0x00000028,
61 .grp_ddrmode = 0x00020000,
62 .grp_b0ds = 0x00000028,
63 .grp_b1ds = 0x00000028,
64 .grp_b2ds = 0x00000028,
65 .grp_b3ds = 0x00000028,
66 .grp_b4ds = 0x00000028,
67 .grp_b5ds = 0x00000028,
68 .grp_b6ds = 0x00000028,
69 .grp_b7ds = 0x00000028,
73 /* Width of data bus: 0=16, 1=32, 2=64 */
79 .cs1_mirror = 0, /* war 0 */
86 .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
87 .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
109 .p0_mpwldectrl0 = 0x00260025,
110 .p0_mpwldectrl1 = 0x00270021,
111 .p1_mpwldectrl0 = 0x00180034,
112 .p1_mpwldectrl1 = 0x00180024,
114 .p0_mpdgctrl0 = 0x04380344,
115 .p0_mpdgctrl1 = 0x0330032C,
116 .p1_mpdgctrl0 = 0x0338033C,
117 .p1_mpdgctrl1 = 0x032C0300,
119 .p0_mprddlctl = 0x3C2E3238,
120 .p1_mprddlctl = 0x3A2E303C,
122 .p0_mpwrdlctl = 0x36384036,
123 .p1_mpwrdlctl = 0x442E4438,
156 memset(__bss_start, 0, __bss_end - __bss_start); in board_init_f()
159 board_init_r(NULL, 0); in board_init_f()