armadeus/apf27/apf27.h

78 #define ACFG_SDRAM_EXIT_PWD		25 /* ns exit power
84 #define ACFG_SDRAM_ROW_PRECHARGE_DELAY	18 /* ns */
91 #define ACFG_SDRAM_RAS_DELAY		42 /* ns ACTIVE-to-PRECHARGE delay */
92 #define ACFG_SDRAM_RRD_DELAY		12 /* ns ACTIVE-to-ACTIVE delay */
93 #define ACFG_SDRAM_RCD_DELAY		18 /* ns Row to Column delay */
94 #define ACFG_SDRAM_RC_DELAY		70 /* ns Row cycle delay (tRFC
97 #define ACFG_SDRAM_CLOCK_CYCLE_CL_1	0 /* ns clock cycle time
124 #define ACFG_SDRAM_EXIT_PWD		25 /* ns exit power
130 #define ACFG_SDRAM_ROW_PRECHARGE_DELAY	18 /* ns */
137 #define ACFG_SDRAM_RAS_DELAY		42 /* ns ACTIVE-to-PRECHARGE delay */
138 #define ACFG_SDRAM_RRD_DELAY		12 /* ns ACTIVE-to-ACTIVE delay */
139 #define ACFG_SDRAM_RCD_DELAY		18 /* ns Row to Column delay */
140 #define ACFG_SDRAM_RC_DELAY		70 /* ns Row cycle delay (tRFC
143 #define ACFG_SDRAM_CLOCK_CYCLE_CL_1	0 /* ns clock cycle time
170 #define ACFG_SDRAM_EXIT_PWD		25 /* ns exit power
176 #define ACFG_SDRAM_ROW_PRECHARGE_DELAY	18 /* ns */
183 #define ACFG_SDRAM_RAS_DELAY		42 /* ns ACTIVE-to-PRECHARGE delay */
184 #define ACFG_SDRAM_RRD_DELAY		12 /* ns ACTIVE-to-ACTIVE delay */
185 #define ACFG_SDRAM_RCD_DELAY		18 /* ns Row to Column delay */
186 #define ACFG_SDRAM_RC_DELAY		70 /* ns Row cycle delay (tRFC
189 #define ACFG_SDRAM_CLOCK_CYCLE_CL_1	0 /* ns clock cycle time
395 /* fixme none integer value (7.5ns) => 2*hclock = 15ns */
396 #define ACFG_2XHCLK_LGTH	(2000/CONFIG_HCLK_FREQ)	/* ns */
414 	|(((CONFIG_CLK0_EN)&0x01)<<25)\