Lines Matching +full:enable +full:- +full:gpio
4 * SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
9 #include <asm/arch-baytrail/fsp/fsp_configs.h>
10 #include <dt-bindings/gpio/x86-gpio.h>
11 #include <dt-bindings/interrupt-router/intel-irq.h>
33 compatible = "intel,x86-pinctrl";
36 /* GPIO E0 */
38 gpio-offset = <0x80 0>;
39 mode-gpio;
40 output-value = <0>;
44 /* GPIO E1 */
46 gpio-offset = <0x80 1>;
47 mode-gpio;
48 output-value = <0>;
52 /* GPIO E2 */
54 gpio-offset = <0x80 2>;
55 mode-gpio;
56 output-value = <0>;
61 gpio-offset = <0x80 8>;
62 mode-gpio;
63 output-value = <1>;
68 gpio-offset = <0x80 9>;
69 mode-gpio;
70 output-value = <1>;
78 * the pin to work in GPIO mode, which causes card detect
85 pad-offset = <0x3a0>;
86 mode-func = <1>;
91 stdout-path = "/serial";
95 #address-cells = <1>;
96 #size-cells = <0>;
100 compatible = "intel,baytrail-cpu";
102 intel,apic-id = <0>;
107 compatible = "intel,baytrail-cpu";
109 intel,apic-id = <4>;
115 compatible = "intel,pci-baytrail", "pci-x86";
116 #address-cells = <3>;
117 #size-cells = <2>;
118 u-boot,dm-pre-reloc;
126 #address-cells = <1>;
127 #size-cells = <1>;
129 irq-router {
130 compatible = "intel,irq-router";
131 intel,pirq-config = "ibase";
132 intel,ibase-offset = <0x50>;
133 intel,actl-addr = <0>;
134 intel,pirq-link = <8 8>;
135 intel,pirq-mask = <0xdee0>;
136 intel,pirq-routing = <
195 #address-cells = <1>;
196 #size-cells = <0>;
197 compatible = "intel,ich9-spi";
198 spi-flash@0 {
199 #address-cells = <1>;
200 #size-cells = <1>;
203 "spi-flash";
204 memory-map = <0xff800000 0x00800000>;
205 rw-mrc-cache {
206 label = "rw-mrc-cache";
213 compatible = "intel,ich6-gpio";
214 u-boot,dm-pre-reloc;
216 bank-name = "A";
217 use-lvl-write-cache;
221 compatible = "intel,ich6-gpio";
222 u-boot,dm-pre-reloc;
224 bank-name = "B";
225 use-lvl-write-cache;
229 compatible = "intel,ich6-gpio";
230 u-boot,dm-pre-reloc;
232 bank-name = "C";
233 use-lvl-write-cache;
237 compatible = "intel,ich6-gpio";
238 u-boot,dm-pre-reloc;
240 bank-name = "D";
241 use-lvl-write-cache;
245 compatible = "intel,ich6-gpio";
246 u-boot,dm-pre-reloc;
248 bank-name = "E";
249 use-lvl-write-cache;
253 compatible = "intel,ich6-gpio";
254 u-boot,dm-pre-reloc;
256 bank-name = "F";
257 use-lvl-write-cache;
263 compatible = "intel,baytrail-fsp";
264 fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
265 fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
266 fsp,mrc-init-spd-addr1 = <0xa0>;
267 fsp,mrc-init-spd-addr2 = <0xa2>;
268 fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>;
269 fsp,enable-sdio;
270 fsp,enable-sdcard;
271 fsp,enable-hsuart1;
272 fsp,enable-spi;
273 fsp,enable-sata;
274 fsp,sata-mode = <SATA_MODE_AHCI>;
276 fsp,enable-xhci;
278 fsp,lpe-mode = <LPE_MODE_PCI>;
279 fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
280 fsp,enable-dma0;
281 fsp,enable-dma1;
282 fsp,enable-i2c0;
283 fsp,enable-i2c1;
284 fsp,enable-i2c2;
285 fsp,enable-i2c3;
286 fsp,enable-i2c4;
287 fsp,enable-i2c5;
288 fsp,enable-i2c6;
289 fsp,enable-pwm0;
290 fsp,enable-pwm1;
291 fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>;
292 fsp,aperture-size = <APERTURE_SIZE_256MB>;
293 fsp,gtt-size = <GTT_SIZE_2MB>;
294 fsp,scc-mode = <SCC_MODE_PCI>;
295 fsp,os-selection = <OS_SELECTION_LINUX>;
296 fsp,emmc45-ddr50-enabled;
297 fsp,emmc45-retune-timer-value = <8>;
298 fsp,enable-igd;
299 fsp,enable-memory-down;
300 fsp,memory-down-params {
301 compatible = "intel,baytrail-fsp-mdp";
302 fsp,dram-speed = <DRAM_SPEED_1066MTS>;
303 fsp,dram-type = <DRAM_TYPE_DDR3L>;
304 fsp,dimm-0-enable;
305 fsp,dimm-width = <DIMM_WIDTH_X16>;
306 fsp,dimm-density = <DIMM_DENSITY_4GBIT>;
307 fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>;
308 fsp,dimm-sides = <DIMM_SIDES_1RANKS>;
309 fsp,dimm-tcl = <0xb>;
310 fsp,dimm-trpt-rcd = <0xb>;
311 fsp,dimm-twr = <0xc>;
312 fsp,dimm-twtr = <6>;
313 fsp,dimm-trrd = <6>;
314 fsp,dimm-trtp = <6>;
315 fsp,dimm-tfaw = <0x14>;