x86/dts/crownbay.dts

4  * SPDX-License-Identifier:	GPL-2.0+
7 /dts-v1/;
9 #include <dt-bindings/interrupt-router/intel-irq.h>
30 		#address-cells = <1>;
31 		#size-cells = <0>;
33 		cpu@0 {
34 			device_type = "cpu";
35 			compatible = "cpu-x86";
37 			intel,apic-id = <0>;
40 		cpu@1 {
41 			device_type = "cpu";
42 			compatible = "cpu-x86";
44 			intel,apic-id = <1>;
52 		 * U-Boot serial console. If we want to use UART from Topcliff
55 		 * For example, stdout-path = &pciuart0 will use the first
58 		stdout-path = "/serial";
68 		#address-cells = <3>;
69 		#size-cells = <2>;
70 		compatible = "pci-x86";
71 		u-boot,dm-pre-reloc;
77 			#address-cells = <3>;
78 			#size-cells = <2>;
79 			compatible = "pci-bridge";
80 			u-boot,dm-pre-reloc;
84 				#address-cells = <3>;
85 				#size-cells = <2>;
86 				compatible = "pci-bridge";
87 				u-boot,dm-pre-reloc;
96 					u-boot,dm-pre-reloc;
99 					reg-shift = <0>;
100 					clock-frequency = <1843200>;
101 					current-speed = <115200>;
110 					u-boot,dm-pre-reloc;
113 					reg-shift = <0>;
114 					clock-frequency = <1843200>;
115 					current-speed = <115200>;
124 					u-boot,dm-pre-reloc;
127 					reg-shift = <0>;
128 					clock-frequency = <1843200>;
129 					current-speed = <115200>;
138 					u-boot,dm-pre-reloc;
141 					reg-shift = <0>;
142 					clock-frequency = <1843200>;
143 					current-speed = <115200>;
151 			#address-cells = <1>;
152 			#size-cells = <1>;
154 			irq-router {
155 				compatible = "intel,queensbay-irq-router";
156 				intel,pirq-config = "pci";
157 				intel,actl-addr = <0x58>;
158 				intel,pirq-link = <0x60 8>;
159 				intel,pirq-mask = <0xcee0>;
160 				intel,pirq-routing = <
166 					PCI_BDF(0, 23, 0) INTC PIRQC
170 					PCI_BDF(0, 24, 0) INTC PIRQD
174 					PCI_BDF(0, 25, 0) INTC PIRQA
178 					PCI_BDF(0, 26, 0) INTC PIRQB
188 					* devices per U-Boot current PCI bus
199 					PCI_BDF(2, 4, 0) INTC PIRQC
200 					PCI_BDF(2, 4, 1) INTC PIRQC
211 					PCI_BDF(2, 12, 0) INTC PIRQC
212 					PCI_BDF(2, 12, 1) INTC PIRQC
213 					PCI_BDF(2, 12, 2) INTC PIRQC
214 					PCI_BDF(2, 12, 3) INTC PIRQC
215 					PCI_BDF(2, 12, 4) INTC PIRQC
220 				#address-cells = <1>;
221 				#size-cells = <0>;
222 				compatible = "intel,ich7-spi";
223 				spi-flash@0 {
226 						"spi-flash";
227 					memory-map = <0xffe00000 0x00200000>;
232 				compatible = "intel,ich6-gpio";
233 				u-boot,dm-pre-reloc;
235 				bank-name = "A";
239 				compatible = "intel,ich6-gpio";
240 				u-boot,dm-pre-reloc;
242 				bank-name = "B";