Lines Matching +full:75 +full:- +full:ec
1 /dts-v1/;
3 #include <dt-bindings/gpio/x86-gpio.h>
14 compatible = "google,link", "intel,celeron-ivybridge";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 u-boot,dm-pre-reloc;
33 compatible = "intel,core-gen3";
35 intel,apic-id = <0>;
36 u-boot,dm-pre-reloc;
41 compatible = "intel,core-gen3";
43 intel,apic-id = <1>;
44 u-boot,dm-pre-reloc;
49 compatible = "intel,core-gen3";
51 intel,apic-id = <2>;
52 u-boot,dm-pre-reloc;
57 compatible = "intel,core-gen3";
59 intel,apic-id = <3>;
60 u-boot,dm-pre-reloc;
66 stdout-path = "/serial";
70 intel,duplicate-por;
74 compatible = "intel,x86-pinctrl";
75 u-boot,dm-pre-reloc;
79 gpio-offset = <0 0>;
80 mode-gpio;
85 gpio-offset = <0>;
86 mode-gpio;
88 output-value = <1>;
92 gpio-offset = <0 3>;
93 mode-gpio;
98 gpio-offset = <0 5>;
99 mode-gpio;
104 gpio-offset = <0 6>;
105 mode-gpio;
107 output-value = <1>;
111 gpio-offset = <0 7>;
112 mode-gpio;
118 gpio-offset = <0 8>;
119 mode-gpio;
125 gpio-offset = <0 9>;
126 mode-gpio;
131 u-boot,dm-pre-reloc;
132 gpio-offset = <0 10>;
133 mode-gpio;
138 gpio-offset = <0 11>;
139 mode-gpio;
144 gpio-offset = <0 12>;
145 mode-gpio;
151 gpio-offset = <0 14>;
152 mode-gpio;
158 gpio-offset = <0 15>;
159 mode-gpio;
165 gpio-offset = <0 21>;
166 mode-gpio;
171 gpio-offset = <0 24>;
172 mode-gpio;
173 output-value = <0>;
178 gpio-offset = <0 28>;
179 mode-gpio;
184 gpio-offset = <0x30 4>;
185 mode-gpio;
187 output-value = <1>;
191 u-boot,dm-pre-reloc;
192 gpio-offset = <0x30 9>;
193 mode-gpio;
198 u-boot,dm-pre-reloc;
199 gpio-offset = <0x30 10>;
200 mode-gpio;
205 u-boot,dm-pre-reloc;
206 gpio-offset = <0x30 11>;
207 mode-gpio;
212 gpio-offset = <0x30 25>;
213 mode-gpio;
218 gpio-offset = <0x30 28>;
219 mode-gpio;
221 output-value = <1>;
227 compatible = "pci-x86";
228 #address-cells = <3>;
229 #size-cells = <2>;
230 u-boot,dm-pre-reloc;
237 u-boot,dm-pre-reloc;
238 compatible = "intel,bd82x6x-northbridge";
239 board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>,
242 u-boot,dm-pre-reloc;
243 #address-cells = <1>;
244 #size-cells = <0>;
246 u-boot,dm-pre-reloc;
282 u-boot,dm-pre-reloc;
334 00 00 00 00 00 00 ad 75
359 intel,panel-port-select = <1>;
360 intel,panel-power-cycle-delay = <6>;
361 intel,panel-power-up-delay = <2000>;
362 intel,panel-power-down-delay = <500>;
363 intel,panel-power-backlight-on-delay = <2000>;
364 intel,panel-power-backlight-off-delay = <2000>;
365 intel,cpu-backlight = <0x00000200>;
366 intel,pch-backlight = <0x04000000>;
372 u-boot,dm-pre-reloc;
377 compatible = "ehci-pci";
382 compatible = "ehci-pci";
388 u-boot,dm-pre-reloc;
389 #address-cells = <1>;
390 #size-cells = <1>;
391 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
393 intel,gpi-routing = <0 0 0 0 0 0 0 2
395 /* Enable EC SMI source */
396 intel,alt-gp-smi-enable = <0x0100>;
399 #address-cells = <1>;
400 #size-cells = <0>;
401 compatible = "intel,ich9-spi";
402 u-boot,dm-pre-reloc;
403 spi-flash@0 {
404 #size-cells = <1>;
405 #address-cells = <1>;
406 u-boot,dm-pre-reloc;
409 "spi-flash";
410 memory-map = <0xff800000 0x00800000>;
411 rw-mrc-cache {
412 label = "rw-mrc-cache";
414 u-boot,dm-pre-reloc;
420 compatible = "intel,ich6-gpio";
421 u-boot,dm-pre-reloc;
422 #gpio-cells = <2>;
423 gpio-controller;
425 bank-name = "A";
429 compatible = "intel,ich6-gpio";
430 u-boot,dm-pre-reloc;
431 #gpio-cells = <2>;
432 gpio-controller;
434 bank-name = "B";
438 compatible = "intel,ich6-gpio";
439 u-boot,dm-pre-reloc;
440 #gpio-cells = <2>;
441 gpio-controller;
443 bank-name = "C";
447 compatible = "intel,bd82x6x-lpc";
448 #address-cells = <1>;
449 #size-cells = <0>;
450 u-boot,dm-pre-reloc;
451 intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
452 cros-ec@200 {
453 compatible = "google,cros-ec";
458 * the EC
460 #address-cells = <1>;
461 #size-cells = <1>;
464 erase-value = <0xff>;
471 compatible = "intel,pantherpoint-ahci";
473 u-boot,dm-pre-reloc;
474 intel,sata-mode = "ahci";
475 intel,sata-port-map = <1>;
476 intel,sata-port0-gen3-tx = <0x00880a7f>;
480 compatible = "intel,ich-i2c";
482 u-boot,dm-pre-reloc;
492 u-boot,dm-pre-reloc;
494 u-boot,dm-pre-reloc;