4  * SPDX-License-Identifier:	GPL-2.0+
21 	u32 base, mask;  in quark_setup_mtrr()  local
46 	mask = ~(CONFIG_SYS_MONITOR_LEN - 1);  in quark_setup_mtrr()
47 	base = CONFIG_SYS_TEXT_BASE & mask;  in quark_setup_mtrr()
51 		       mask | MTRR_PHYS_MASK_VALID);  in quark_setup_mtrr()
54 	mask = ~(ESRAM_SIZE - 1);  in quark_setup_mtrr()
55 	base = CONFIG_ESRAM_BASE & mask;  in quark_setup_mtrr()
59 		       mask | MTRR_PHYS_MASK_VALID);  in quark_setup_mtrr()
70 	/* GPIO - D31:F0:R44h */  in quark_setup_bars()
74 	/* ACPI PM1 Block - D31:F0:R48h */  in quark_setup_bars()
78 	/* GPE0 - D31:F0:R4Ch */  in quark_setup_bars()
82 	/* WDT - D31:F0:R84h */  in quark_setup_bars()
86 	/* RCBA - D31:F0:RF0h */  in quark_setup_bars()
90 	/* ACPI P Block - Msg Port 04:R70h */  in quark_setup_bars()
94 	/* SPI DMA - Msg Port 04:R7Ah */  in quark_setup_bars()
111 	 * Call the board-specific codes to perform this task.  in quark_pcie_early_init()
115 	/* Step2: PHY common lane reset */  in quark_pcie_early_init()
117 	/* wait 1 ms for PHY common lane reset */  in quark_pcie_early_init()
120 	/* Step3: PHY sideband interface reset and controller main reset */  in quark_pcie_early_init()
126 	/* Step4: Controller sideband interface reset */  in quark_pcie_early_init()
128 	/* wait 20ms for controller sideband interface reset */  in quark_pcie_early_init()
131 	/* Step5: De-assert PERST# */  in quark_pcie_early_init()
134 	/* Step6: Controller primary interface reset */  in quark_pcie_early_init()
195 	/* take thermal sensor out of reset */  in quark_thermal_early_init()
229 	 * Quark SoC has some non-standard BARs (excluding PCI standard BARs)  in arch_cpu_init()
251 	 * Quark SoC holds the PCIe controller in reset following a power on.  in arch_cpu_init_dm()
252 	 * U-Boot needs to release the PCIe controller from reset. The PCIe  in arch_cpu_init_dm()
255 	 * system hang while it is held in reset.  in arch_cpu_init_dm()
275 	/* cold reset */  in reset_cpu()
283 	/* PCIe upstream non-posted & posted request size */  in quark_pcie_init()
353 	val = readl(&rcba->esd);  in board_final_cleanup()
355 	writel(val, &rcba->esd);  in board_final_cleanup()