cpu/quark/hte.c

8  * SPDX-License-Identifier:	Intel
19  * (per-bit or full byte lane).
74  * Execute a basic single-cache-line memory write/read/verify test using simple
81  * @first_run: if set then the HTE registers are configured, otherwise it is
82  *             assumed configuration is done and we just re-run the test
126  * Examine a single-cache-line memory with write/read/verify test using multiple
127  * data patterns (victim-aggressor algorithm).
136  * @victim_bit: should be 0 as auto-rotate feature is in use
137  * @first_run: if set then the HTE registers are configured, otherwise it is
138  *             assumed configuration is done and we just re-run the test
226 	msg_port_write(HTE, 0x00020022, (mrc_params->mem_size >> 6) - 1);  in hte_mem_init()
287  * Execute a basic single-cache-line memory write/read/verify test using simple
292  * @first_run: if set then the HTE registers are configured, otherwise it is
293  *             assumed configuration is done and we just re-run the test
317  * Examine a single-cache-line memory with write/read/verify test using multiple
318  * data patterns (victim-aggressor algorithm).
322  * @first_run: if set then the HTE registers are configured, otherwise it is
323  *             assumed configuration is done and we just re-run the test
343 	 * as aggressors. AVN HTE adds an auto-rotate feature which allows us  in hte_write_stress_bit_lanes()
359  * Execute a basic single-cache-line memory write or read.
360  * This is just for receive enable / fine write-levelling purpose.
363  * @first_run: if set then the HTE registers are configured, otherwise it is
364  *             assumed configuration is done and we just re-run the test
365  * @is_write: when non-zero memory write operation executed, otherwise read