4  * From coreboot src/soc/intel/broadwell/sata.c
6  * SPDX-License-Identifier:	GPL-2.0
27 	 * SATA DEVSLP Mux
28 	 * 0 = port 0 DEVSLP on DEVSLP0/GPIO33
29 	 * 1 = port 3 DEVSLP on DEVSLP0/GPIO33
47 	int port;  in broadwell_sata_init()  local
49 	debug("SATA: Initializing controller in AHCI mode.\n");  in broadwell_sata_init()
55 	/* for AHCI, Port Enable is managed in memory mapped space */  in broadwell_sata_init()
58 	reg16 |= 0x8000 | plat->port_map;  in broadwell_sata_init()
74 	/* SATA Initialization register */  in broadwell_sata_init()
76 	reg32 |= (plat->port_map ^ 0xf) << 24;  in broadwell_sata_init()
77 	reg32 |= (plat->devslp_mux & 1) << 15;  in broadwell_sata_init()
80 	/* Initialize AHCI memory-mapped space */  in broadwell_sata_init()
88 			1 << 18); /* SAM: SATA AHCI MODE ONLY */  in broadwell_sata_init()
91 	writel(plat->port_map, abar + 0x0c);  in broadwell_sata_init()
96 	if (plat->devslp_disable) {  in broadwell_sata_init()
102 		for (port = 0; port < 4; port++) {  in broadwell_sata_init()
103 			if (!(plat->port_map & (1 << port)))  in broadwell_sata_init()
106 			setbits_le32(abar + 0x144 + (0x80 * port), 1 << 1);  in broadwell_sata_init()
112 	/* Port 3 and 2 disabled */  in broadwell_sata_init()
113 	if ((plat->port_map & ((1 << 3)|(1 << 2))) == 0)  in broadwell_sata_init()
115 	/* Port 1 and 0 disabled */  in broadwell_sata_init()
116 	if ((plat->port_map & ((1 << 1)|(1 << 0))) == 0)  in broadwell_sata_init()
121 	if (plat->port0_gen3_tx)  in broadwell_sata_init()
125 				(plat->port0_gen3_tx &  in broadwell_sata_init()
129 	if (plat->port1_gen3_tx)  in broadwell_sata_init()
133 				(plat->port1_gen3_tx &  in broadwell_sata_init()
138 	if (plat->port0_gen3_dtle) {  in broadwell_sata_init()
141 				(plat->port0_gen3_dtle & SATA_DTLE_MASK)  in broadwell_sata_init()
146 				(plat->port0_gen3_dtle & SATA_DTLE_MASK)  in broadwell_sata_init()
150 	if (plat->port1_gen3_dtle) {  in broadwell_sata_init()
153 				(plat->port1_gen3_dtle & SATA_DTLE_MASK)  in broadwell_sata_init()
158 				(plat->port1_gen3_dtle & SATA_DTLE_MASK)  in broadwell_sata_init()
219 	 * Set SATA controller mode early so the resource allocator can  in broadwell_sata_enable()
224 	map |= (plat->port_map ^ 0x3f) << 8;  in broadwell_sata_enable()
227 	ret = gpio_request_by_name(dev, "reset-gpio", 0, &desc, GPIOD_IS_OUT);  in broadwell_sata_enable()
237 	const void *blob = gd->fdt_blob;  in broadwell_sata_ofdata_to_platdata()
240 	plat->port_map = fdtdec_get_int(blob, node, "intel,sata-port-map", 0);  in broadwell_sata_ofdata_to_platdata()
241 	plat->port0_gen3_tx = fdtdec_get_int(blob, node,  in broadwell_sata_ofdata_to_platdata()
242 					"intel,sata-port0-gen3-tx", 0);  in broadwell_sata_ofdata_to_platdata()
249 	if (!(gd->flags & GD_FLG_RELOC))  in broadwell_sata_probe()
258 	{ .compatible = "intel,wildcatpoint-ahci" },