Lines Matching refs:MCHBAR_REG
172 if (!(readl(MCHBAR_REG(BIOS_MAILBOX_INTERFACE)) & in pcode_ready()
193 writel(command | MAILBOX_RUN_BUSY, MCHBAR_REG(BIOS_MAILBOX_INTERFACE)); in pcode_mailbox_read()
202 return readl(MCHBAR_REG(BIOS_MAILBOX_DATA)); in pcode_mailbox_read()
215 writel(data, MCHBAR_REG(BIOS_MAILBOX_DATA)); in pcode_mailbox_write()
218 writel(command | MAILBOX_RUN_BUSY, MCHBAR_REG(BIOS_MAILBOX_INTERFACE)); in pcode_mailbox_write()
312 writel(~0, MCHBAR_REG(BIOS_MAILBOX_DATA)); in calibrate_24mhz_bclk()
314 MCHBAR_REG(BIOS_MAILBOX_INTERFACE)); in calibrate_24mhz_bclk()
320 err_code = readl(MCHBAR_REG(BIOS_MAILBOX_INTERFACE)) & 0xff; in calibrate_24mhz_bclk()
326 MCHBAR_REG(BIOS_MAILBOX_INTERFACE)); in calibrate_24mhz_bclk()
333 readl(MCHBAR_REG(BIOS_MAILBOX_DATA))); in calibrate_24mhz_bclk()
704 writel(limit.lo, MCHBAR_REG(MCH_PKG_POWER_LIMIT_LO)); in cpu_set_power_limits()
705 writel(limit.hi, MCHBAR_REG(MCH_PKG_POWER_LIMIT_HI)); in cpu_set_power_limits()
708 msr.lo = readl(MCHBAR_REG(MCH_DDR_POWER_LIMIT_LO)); in cpu_set_power_limits()
709 msr.hi = readl(MCHBAR_REG(MCH_DDR_POWER_LIMIT_HI)); in cpu_set_power_limits()