Lines Matching +full:system +full:- +full:on +full:- +full:chip
2 depends on X86
8 prompt "Run U-Boot in 32/64-bit mode"
11 U-Boot can be built as a 32-bit binary which runs in 32-bit mode
12 even on 64-bit machines. In this case SPL is not used, and U-Boot
13 runs directly from the reset vector (via 16-bit start-up).
15 Alternatively it can be run as a 64-bit binary, thus requiring a
16 64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit
17 start-up) then jumps to U-Boot in 64-bit mode.
19 For now, 32-bit mode is recommended, as 64-bit is still
23 bool "32-bit"
25 Build U-Boot as a 32-bit binary with no SPL. This is the currently
26 supported normal setup. U-Boot will stay in 32-bit mode even on
27 64-bit machines. When booting a 64-bit kernel, U-Boot will switch
28 to 64-bit just before starting the kernel. Only the bottom 4GB of
33 bool "64-bit"
39 Build U-Boot as a 64-bit binary with a 32-bit SPL. This is
40 experimental and many features are missing. U-Boot SPL starts up,
41 runs through the 16-bit and 32-bit init, then switches to 64-bit
42 mode and jumps to U-Boot proper.
51 depends on SPL
83 # subarchitectures-specific options below
89 Select to build a U-Boot capable of supporting Intel MID
93 If you are building for a PC class system say N here.
95 Intel MID platforms are based on an Intel processor and
99 # board-specific options below
109 # platform-specific options below
119 # architecture-specific options below
133 depends on X86_RESET_VECTOR
156 # The following options control where the 16-bit and 32-bit init lies
157 # If SPL is enabled then it normally holds this init code, and U-Boot proper
158 # is normally a 64-bit build.
160 # The 16-bit init refers to the reset vector and the small amount of code to
161 # get the processor into 32-bit mode. It may be in SPL or in U-Boot proper,
162 # or missing altogether if U-Boot is started from EFI or coreboot.
164 # The 32-bit init refers to processor init, running binary blobs including
166 # 32-bit code. It is normally in the same place as 16-bit init if that is
167 # enabled (i.e. they are both in SPL, or both in U-Boot proper).
170 depends on X86_RESET_VECTOR
173 This is enabled when 16-bit init is in U-Boot proper
177 depends on X86_RESET_VECTOR
180 This is enabled when 16-bit init is in SPL
184 depends on X86_RESET_VECTOR
187 This is enabled when 32-bit init is in U-Boot proper
191 depends on X86_RESET_VECTOR
194 This is enabled when 32-bit init is in SPL
198 depends on X86_RESET_VECTOR
203 depends on X86_RESET_VECTOR
208 depends on X86_RESET_VECTOR
213 depends on X86_RESET_VECTOR
217 bool "Boot from a 32-bit program"
219 Define this to boot U-Boot from a 32-bit program which sets
222 payload-loading feature.
238 prompt "ROM chip size"
239 depends on X86_RESET_VECTOR
247 Select the size of the ROM chip you intend to flash U-Boot on.
249 The build system will take care of creating a u-boot.rom file
255 Choose this option if you have a 512 KB ROM chip.
260 Choose this option if you have a 1024 KB (1 MB) ROM chip.
265 Choose this option if you have a 2048 KB (2 MB) ROM chip.
270 Choose this option if you have a 4096 KB (4 MB) ROM chip.
275 Choose this option if you have a 8192 KB (8 MB) ROM chip.
280 Choose this option if you have a 16384 KB (16 MB) ROM chip.
308 Newer higher-end devices have an Intel Management Engine (ME)
318 often crash within U-Boot or the kernel. This option enables a
325 depends on HAVE_INTEL_ME
333 depends on HAVE_INTEL_ME
341 depends on !EFI
344 the resulting U-Boot image. It is a binary blob which U-Boot uses
347 Note: Without this binary U-Boot will not be able to set up its
352 depends on HAVE_FSP
360 depends on HAVE_FSP
373 depends on HAVE_FSP
381 depends on HAVE_FSP
388 depends on HAVE_FSP
397 depends on HAVE_FSP
401 tell U-Boot to do some additional work to ensure U-Boot relocation
407 depends on HAVE_FSP
409 Some Intel FSP (like Braswell) does SPI lock-down during the call
410 to fsp_notify(INIT_PHASE_BOOT). This option should be turned on
411 for such FSP and U-Boot will configure the SPI opcode registers
412 before the lock-down.
416 depends on !EFI && !SYS_COREBOOT
419 to be used for speeding up boot time on future reboots and/or
423 please check FSP output HOB via U-Boot command 'fsp hob' to see
425 If such GUID does not exist, MRC cache is not avaiable on such
430 bool "Add a System Agent binary"
431 depends on !HAVE_FSP
433 Select this option to add a System Agent binary to
434 the resulting U-Boot image. MRC stands for Memory Reference Code.
435 It is a binary blob which U-Boot uses to set up SDRAM.
437 Note: Without this binary U-Boot will not be able to set up its
442 depends on HAVE_MRC
446 MTRR (memory type range register) to turn on caching for the section
452 depends on HAVE_MRC
462 depends on HAVE_MRC
465 start address of the cache-as-RAM (CAR) area and the address varies
466 depending on the CPU. Once CAR is set up, read/write memory becomes
472 depends on HAVE_MRC
476 sets the size of the cache-as-RAM (CAR) area. Note that much of the
477 CAR space is required by the MRC. The CAR space available to U-Boot
483 depends on HAVE_MRC
486 memory reference code. This depends on the implementation of the
494 U-Boot image. This is an Intel binary blob that handles system
495 initialisation, in this case the PCH and System Agent.
497 Note: Without this binary (on platforms that need it such as
498 broadwell) U-Boot will be missing some critical setup steps.
505 Enable use of more than one CPU in U-Boot and the Operating System
513 depends on SMP
516 When using multi-CPU chips it is possible for U-Boot to start up
518 pre-allocated so at present U-Boot wants to know the maximum
520 as the number of CPUs in your system (it uses about 4KB of RAM for
525 depends on SMP
528 Each additional CPU started by U-Boot requires its own stack. This
537 scoped. i.e. turbo_enable() needs to be called on not just the
548 depends on HAVE_VGA_BIOS
555 depends on HAVE_VGA_BIOS
568 those tables, including PIRQ routing table, Multi-Processor
575 menu "System tables"
576 depends on !EFI && !SYS_COREBOOT
583 is generated by U-Boot in the system memory from 0xf0000 to 0xfffff
584 at every 16-byte boundary with a PCI IRQ routing signature ("$PIR").
592 for platform firmware to pass information to the operating system
594 boot on SFI-only platforms. If you have ACPI tables then these are
597 U-Boot writes this table in write_sfi_table() just before booting
603 bool "Generate an MP (Multi-Processor) table"
606 Generate an MP (Multi-Processor) table for this board. The MP table
607 provides a way for the operating system to support for symmetric
618 by the operating system. It defines platform-independent interfaces
626 Select this to enable ACPI S3 resume. S3 is an ACPI-defined sleeping
627 state where all system context is lost except system memory. U-Boot
631 registers, U-Boot needs to write the original value. When everything
632 is done, U-Boot needs to find out the wakeup vector provided by OSes
636 bool "Re-run VGA option ROMs on S3 resume"
637 depends on HAVE_ACPI_RESUME
640 Execute VGA option ROMs in U-Boot when resuming from S3. Normally
645 if your kernel is only on a serial console.
649 depends on HAVE_ACPI_RESUME
652 Estimated U-Boot's runtime stack size that needs to be reserved
660 routable. On most older chipsets, this is 4, PIRQA through PIRQD.
667 U-Boot can support up to 254 IRQ slot info in the PIRQ routing table
676 This is the memory-mapped address of PCI configuration space, which
683 assigned to PCI devices - i.e. the memory and prefetch regions, as
690 This is the size of memory-mapped address of PCI configuration space,
701 slave) interrupt controllers. Include this to have U-Boot set up
709 Include this to have U-Boot set up the timer correctly.
714 SeaBIOS is an open source implementation of a 16-bit X86 BIOS.
715 It can run in an emulator or natively on X86 hardware with the use
716 of coreboot/U-Boot. By turning on this option, U-Boot prepares
724 depends on SEABIOS
726 SeaBIOS itself resides in E seg and F seg, where U-Boot puts all
727 configuration tables like PIRQ/MP/ACPI. To avoid conflicts, U-Boot
729 is reserved on the stack before relocation. The region size is