Lines Matching refs:uint
16 uint mr; /* DMA mode register */
32 uint sr; /* DMA status register */
37 uint cdar; /* DMA current descriptor address register */
39 uint sar; /* DMA source address register */
41 uint dar; /* DMA destination address register */
43 uint bcr; /* DMA byte count register */
44 uint ndar; /* DMA next descriptor address register */
45 uint gsr; /* DMA general status register (DMA3 ONLY!) */
50 uint mr; /* DMA mode register */
71 uint sr; /* DMA status register */
80 uint clndar; /* DMA current link descriptor address register */
81 uint satr; /* DMA source attributes register */
91 uint sar; /* DMA source address register */
92 uint datr; /* DMA destination attributes register */
103 uint dar; /* DMA destination address register */
104 uint bcr; /* DMA byte count register */
106 uint nlndar; /* DMA next link descriptor address register */
108 uint clabdar; /* DMA current List - alternate base descriptor address Register */
110 uint nlsdar; /* DMA next list descriptor address register */
111 uint ssr; /* DMA source stride register */
112 uint dsr; /* DMA destination stride register */
121 void dma_meminit(uint val, uint size);