Lines Matching refs:ori
137 ori r2, r2, L2CSR0_L2E@l
144 ori r2, r2, (L2CSR0_L2FL)@l
157 ori r2, r2, L2CSR0_L2E@l
180 ori \scratch, \scratch, FSL_BOOKE_MAS0(1, \esel, 0)@l
183 ori \scratch, \scratch, FSL_BOOKE_MAS1(1, 1, 0, \ts, \tsize)@l
186 ori \scratch, \scratch, FSL_BOOKE_MAS2(\epn, \wimg)@l
189 ori \scratch, \scratch, FSL_BOOKE_MAS3(\rpn, 0, \perm)@l
192 ori \scratch, \scratch, \phy_high@l
202 ori \scratch, \scratch, FSL_BOOKE_MAS0(0, \esel, 0)@l
205 ori \scratch, \scratch, FSL_BOOKE_MAS1(1, 0, 0, \ts, \tsize)@l
208 ori \scratch, \scratch, FSL_BOOKE_MAS2(\epn, \wimg)@l
211 ori \scratch, \scratch, FSL_BOOKE_MAS3(\rpn, 0, \perm)@l
214 ori \scratch, \scratch, \phy_high@l
224 ori \scratch, \scratch, FSL_BOOKE_MAS0(1, \esel, 0)@l
236 ori \scratch, \scratch, FSL_BOOKE_MAS0(0, \esel, 0)@l
241 ori \scratch, \scratch, FSL_BOOKE_MAS2(\epn, \wimg)@l
307 ori r0,r0,HID0_ENMAS7@l /* Enable MAS7 */
310 ori r0,r0,HID0_TBEN@l /* Enable Timebase */
321 ori r0, r0, HID1_MBDD@l
335 ori r0,r0,BUCSR_ENABLE@l
341 ori r1,r1,0xffff
344 ori r0,r0,CONFIG_SYS_INIT_DBCR@l
366 ori r4,r4,CONFIG_SYS_LBCR_ADDR@l
369 ori r5,r5,CONFIG_SYS_LBC_LBCR@l
375 ori r4,r4,CONFIG_SYS_LBC_ADDR@l
406 ori r3, r3, MAS1_TSIZE(BOOKE_PAGESZ_4K)@l
415 ori r3, r3, MAS2_EPN@l /* R3 = MAS2_EPN */
427 ori r2, r2, MAS2_G
529 ori r8, r8, CONFIG_SYS_CCSRBAR@l
531 ori r9, r9, (CONFIG_SYS_CCSRBAR + 0x1000)@l
557 ori r0, r0, CONFIG_SYS_CCSRBAR_DEFAULT@l
589 ori r0, r0, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
591 ori r1, r1, CONFIG_SYS_CCSRBAR_PHYS_LOW@l
593 ori r2, r2, CCSRBAR_LAWAR@l
628 ori r0, r0, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
630 ori r1, r1, CONFIG_SYS_CCSRBAR_PHYS_LOW@l
632 ori r2, r2, CCSRAR_C@l
673 ori r0, r0, CCSRBAR_PHYS_RS12@l
716 ori r3, r3, (CONFIG_SYS_CCSRBAR + 0xC20000)@l
720 ori r4, r4, (L2CSR0_L2FI|L2CSR0_L2LFC)@l
733 ori r4, r4, (L2CSR0_L2PE)@l
745 ori r4, r4, (L2CSR0_L2REP_MODE)@l
773 ori r2,r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@l
781 ori r3,r3,(L1CSR1_CPE|L1CSR1_ICE)@l
791 ori r2,r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@l
799 ori r3,r3,(L1CSR0_CPE|L1CSR0_DCE)@l
827 ori r1, r1, FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16M)@l
829 ori r7, r7, CONFIG_SYS_CCSRBAR@l
830 ori r2, r7, MAS2_I|MAS2_G
832 ori r3, r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS_LOW, 0, (MAS3_SW|MAS3_SR))@l
834 ori r4, r4, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
848 ori r3, r3, DCSRBAR_LAWAR@l
865 ori r1, r1, FSL_BOOKE_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1M)@l
867 ori r2, r6, MAS2_I|MAS2_G
893 ori r4, r4, \value@l
901 ori r4, r4, \value@l
933 ori r3,r3,(L1CSR1_ICFI|L1CSR1_ICLFR)@l
944 ori r3,r3,(L1CSR1_CPE|L1CSR1_ICE)@l
1059 ori r6,r6,FSL_BOOKE_MAS0(1, 15, 0)@l
1125 ori r6,r6,MSR_IS|MSR_DS|MSR_DE@l
1127 ori r7,r7,switch_as@l
1139 ori r3,r3,CONFIG_SYS_INIT_RAM_ADDR@l
1165 ori r3,r3,CONFIG_SYS_MONITOR_BASE@l
1184 ori r3,r3,((CONFIG_SYS_INIT_SP_OFFSET-16)&~0xf)@l /* Align to 16 */
1197 ori r4,r4,(CONFIG_SYS_INIT_RAM_SIZE)@l
1208 ori r4,r4,(CONFIG_SYS_GBL_DATA_OFFSET)@l
1228 ori r3,r3,(MSR_CE|MSR_ME|MSR_DE)@l
1318 ori r4,r4,MSR_EE
1352 ori r0,r0,L1CSR1_ICFI
1362 ori r0,r0,L1CSR0_DCFI
1376 ori r4,r4,(L1CSR1_CPE | L1CSR1_ICE)@l
1386 ori r3,r3,L1CSR1_ICE
1405 ori r0,r0,(L1CSR0_CPE | L1CSR0_DCE)@l
1417 ori r4,r4,L1CSR0_DCE
1570 ori r4,r4,CONFIG_SYS_MONITOR_BASE@l
1777 ori r3,r3,(CONFIG_SYS_INIT_RAM_ADDR & ~(CONFIG_SYS_CACHELINE_SIZE-1))@l
1795 ori r3,r3,CONFIG_SYS_INIT_RAM_ADDR@l
1828 ori r9,r8,HID0_DCFA@l