96 	u32 tmp;  in fsl_serdes_init()  local
116 		tmp = in_be32(sd + FSL_SRDSCR0_OFFS);  in fsl_serdes_init()
117 		tmp &= ~FSL_SRDSCR0_TXEQA_MASK;  in fsl_serdes_init()
118 		tmp |= FSL_SRDSCR0_TXEQA_SATA;  in fsl_serdes_init()
119 		tmp &= ~FSL_SRDSCR0_TXEQE_MASK;  in fsl_serdes_init()
120 		tmp |= FSL_SRDSCR0_TXEQE_SATA;  in fsl_serdes_init()
121 		out_be32(sd + FSL_SRDSCR0_OFFS, tmp);  in fsl_serdes_init()
123 		tmp = in_be32(sd + FSL_SRDSCR1_OFFS);  in fsl_serdes_init()
124 		tmp &= ~FSL_SRDSCR1_LANEA_MASK;  in fsl_serdes_init()
125 		tmp &= ~FSL_SRDSCR1_LANEE_MASK;  in fsl_serdes_init()
126 		out_be32(sd + FSL_SRDSCR1_OFFS, tmp);  in fsl_serdes_init()
128 		tmp = in_be32(sd + FSL_SRDSCR2_OFFS);  in fsl_serdes_init()
129 		tmp &= ~FSL_SRDSCR2_EICA_MASK;  in fsl_serdes_init()
130 		tmp |= FSL_SRDSCR2_EICA_SATA;  in fsl_serdes_init()
131 		tmp &= ~FSL_SRDSCR2_EICE_MASK;  in fsl_serdes_init()
132 		tmp |= FSL_SRDSCR2_EICE_SATA;  in fsl_serdes_init()
133 		out_be32(sd + FSL_SRDSCR2_OFFS, tmp);  in fsl_serdes_init()
135 		tmp = in_be32(sd + FSL_SRDSCR3_OFFS);  in fsl_serdes_init()
136 		tmp &= ~FSL_SRDSCR3_LANEA_MASK;  in fsl_serdes_init()
137 		tmp |= FSL_SRDSCR3_LANEA_SATA;  in fsl_serdes_init()
138 		tmp &= ~FSL_SRDSCR3_LANEE_MASK;  in fsl_serdes_init()
139 		tmp |= FSL_SRDSCR3_LANEE_SATA;  in fsl_serdes_init()
140 		out_be32(sd + FSL_SRDSCR3_OFFS, tmp);  in fsl_serdes_init()
144 		tmp = in_be32(sd + FSL_SRDSCR0_OFFS);  in fsl_serdes_init()
145 		tmp &= ~FSL_SRDSCR0_TXEQA_MASK;  in fsl_serdes_init()
146 		tmp |= FSL_SRDSCR0_TXEQA_SATA;  in fsl_serdes_init()
147 		out_be32(sd + FSL_SRDSCR0_OFFS, tmp);  in fsl_serdes_init()
149 		tmp = in_be32(sd + FSL_SRDSCR1_OFFS);  in fsl_serdes_init()
150 		tmp &= ~FSL_SRDSCR1_LANEE_MASK;  in fsl_serdes_init()
151 		tmp |= FSL_SRDSCR1_LANEE_OFF;  in fsl_serdes_init()
152 		out_be32(sd + FSL_SRDSCR1_OFFS, tmp);  in fsl_serdes_init()
154 		tmp = in_be32(sd + FSL_SRDSCR2_OFFS);  in fsl_serdes_init()
155 		tmp &= ~FSL_SRDSCR2_EICA_MASK;  in fsl_serdes_init()
156 		tmp |= FSL_SRDSCR2_EICA_SATA;  in fsl_serdes_init()
157 		out_be32(sd + FSL_SRDSCR2_OFFS, tmp);  in fsl_serdes_init()
159 		tmp = in_be32(sd + FSL_SRDSCR3_OFFS);  in fsl_serdes_init()
160 		tmp &= ~FSL_SRDSCR3_LANEA_MASK;  in fsl_serdes_init()
161 		tmp |= FSL_SRDSCR3_LANEA_SATA;  in fsl_serdes_init()
162 		out_be32(sd + FSL_SRDSCR3_OFFS, tmp);  in fsl_serdes_init()
166 		tmp = in_be32(sd + FSL_SRDSCR0_OFFS);  in fsl_serdes_init()
167 		tmp &= ~FSL_SRDSCR0_TXEQA_MASK;  in fsl_serdes_init()
168 		tmp |= FSL_SRDSCR0_TXEQA_SGMII;  in fsl_serdes_init()
169 		tmp &= ~FSL_SRDSCR0_TXEQE_MASK;  in fsl_serdes_init()
170 		tmp |= FSL_SRDSCR0_TXEQE_SGMII;  in fsl_serdes_init()
171 		out_be32(sd + FSL_SRDSCR0_OFFS, tmp);  in fsl_serdes_init()
173 		tmp = in_be32(sd + FSL_SRDSCR1_OFFS);  in fsl_serdes_init()
174 		tmp &= ~FSL_SRDSCR1_LANEA_MASK;  in fsl_serdes_init()
175 		tmp &= ~FSL_SRDSCR1_LANEE_MASK;  in fsl_serdes_init()
176 		out_be32(sd + FSL_SRDSCR1_OFFS, tmp);  in fsl_serdes_init()
178 		tmp = in_be32(sd + FSL_SRDSCR2_OFFS);  in fsl_serdes_init()
179 		tmp &= ~FSL_SRDSCR2_EICA_MASK;  in fsl_serdes_init()
180 		tmp |= FSL_SRDSCR2_EICA_SGMII;  in fsl_serdes_init()
181 		tmp &= ~FSL_SRDSCR2_EICE_MASK;  in fsl_serdes_init()
182 		tmp |= FSL_SRDSCR2_EICE_SGMII;  in fsl_serdes_init()
183 		out_be32(sd + FSL_SRDSCR2_OFFS, tmp);  in fsl_serdes_init()
185 		tmp = in_be32(sd + FSL_SRDSCR3_OFFS);  in fsl_serdes_init()
186 		tmp &= ~FSL_SRDSCR3_LANEA_MASK;  in fsl_serdes_init()
187 		tmp |= FSL_SRDSCR3_LANEA_SGMII;  in fsl_serdes_init()
188 		tmp &= ~FSL_SRDSCR3_LANEE_MASK;  in fsl_serdes_init()
189 		tmp |= FSL_SRDSCR3_LANEE_SGMII;  in fsl_serdes_init()
190 		out_be32(sd + FSL_SRDSCR3_OFFS, tmp);  in fsl_serdes_init()
194 		tmp = in_be32(sd + FSL_SRDSCR0_OFFS);  in fsl_serdes_init()
195 		tmp &= ~FSL_SRDSCR0_TXEQA_MASK;  in fsl_serdes_init()
196 		tmp |= FSL_SRDSCR0_TXEQA_SGMII;  in fsl_serdes_init()
197 		out_be32(sd + FSL_SRDSCR0_OFFS, tmp);  in fsl_serdes_init()
199 		tmp = in_be32(sd + FSL_SRDSCR1_OFFS);  in fsl_serdes_init()
200 		tmp &= ~FSL_SRDSCR1_LANEE_MASK;  in fsl_serdes_init()
201 		tmp |= FSL_SRDSCR1_LANEE_OFF;  in fsl_serdes_init()
202 		out_be32(sd + FSL_SRDSCR1_OFFS, tmp);  in fsl_serdes_init()
204 		tmp = in_be32(sd + FSL_SRDSCR2_OFFS);  in fsl_serdes_init()
205 		tmp &= ~FSL_SRDSCR2_EICA_MASK;  in fsl_serdes_init()
206 		tmp |= FSL_SRDSCR2_EICA_SGMII;  in fsl_serdes_init()
207 		out_be32(sd + FSL_SRDSCR2_OFFS, tmp);  in fsl_serdes_init()
209 		tmp = in_be32(sd + FSL_SRDSCR3_OFFS);  in fsl_serdes_init()
210 		tmp &= ~FSL_SRDSCR3_LANEA_MASK;  in fsl_serdes_init()
211 		tmp |= FSL_SRDSCR3_LANEA_SGMII;  in fsl_serdes_init()
212 		out_be32(sd + FSL_SRDSCR3_OFFS, tmp);  in fsl_serdes_init()
216 		tmp = in_be32(sd + FSL_SRDSCR1_OFFS);  in fsl_serdes_init()
217 		tmp &= ~FSL_SRDSCR1_LANEA_MASK;  in fsl_serdes_init()
218 		tmp |= FSL_SRDSCR1_LANEA_OFF;  in fsl_serdes_init()
219 		tmp &= ~FSL_SRDSCR1_LANEE_MASK;  in fsl_serdes_init()
220 		tmp |= FSL_SRDSCR1_LANEE_OFF;  in fsl_serdes_init()
221 		out_be32(sd + FSL_SRDSCR1_OFFS, tmp);  in fsl_serdes_init()