Lines Matching refs:blob
28 extern void ft_qe_setup(void *blob);
29 extern void ft_fixup_num_cores(void *blob);
30 extern void ft_srio_setup(void *blob);
35 void ft_fixup_cpu(void *blob, u64 memory_limit) in ft_fixup_cpu() argument
48 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_cpu()
50 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); in ft_fixup_cpu()
57 fdt_setprop_string(blob, off, "status", in ft_fixup_cpu()
60 fdt_setprop_string(blob, off, "status", in ft_fixup_cpu()
76 fdt_setprop(blob, off, "cpu-release-addr", in ft_fixup_cpu()
80 fdt_setprop_string(blob, off, "enable-method", in ft_fixup_cpu()
85 off = fdt_node_offset_by_prop_value(blob, off, in ft_fixup_cpu()
101 off = fdt_add_mem_rsv(blob, T1040_TDM_QUIRK_CCSR_BASE, in ft_fixup_cpu()
111 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096); in ft_fixup_cpu()
124 off = fdt_add_mem_rsv(blob, 0xfffff000ull, (u64)4096); in ft_fixup_cpu()
134 off = fdt_add_mem_rsv(blob, in ft_fixup_cpu()
142 off = fdt_add_mem_rsv(blob, CONFIG_SYS_MMC_U_BOOT_START, in ft_fixup_cpu()
148 off = fdt_add_mem_rsv(blob, CONFIG_SYS_SPI_FLASH_U_BOOT_START, in ft_fixup_cpu()
159 static inline void ft_fixup_l3cache(void *blob, int off) in ft_fixup_l3cache() argument
170 fdt_setprop(blob, off, "cache-unified", NULL, 0); in ft_fixup_l3cache()
171 fdt_setprop_cell(blob, off, "cache-block-size", line_size); in ft_fixup_l3cache()
172 fdt_setprop_cell(blob, off, "cache-size", size); in ft_fixup_l3cache()
173 fdt_setprop_cell(blob, off, "cache-sets", num_sets); in ft_fixup_l3cache()
174 fdt_setprop_cell(blob, off, "cache-level", 3); in ft_fixup_l3cache()
176 fdt_setprop_cell(blob, off, "cache-stash-id", 1); in ft_fixup_l3cache()
186 static inline void ft_fixup_l2cache_compatible(void *blob, int off) in ft_fixup_l2cache_compatible() argument
211 fdt_setprop(blob, off, "compatible", buf, len); in ft_fixup_l2cache_compatible()
249 static inline void ft_fixup_l2cache(void *blob) in ft_fixup_l2cache() argument
259 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_l2cache()
265 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0); in ft_fixup_l2cache()
272 off = fdt_node_offset_by_phandle(blob, *ph); in ft_fixup_l2cache()
278 ft_fixup_l2cache_compatible(blob, off); in ft_fixup_l2cache()
279 fdt_setprop(blob, off, "cache-unified", NULL, 0); in ft_fixup_l2cache()
280 fdt_setprop_cell(blob, off, "cache-block-size", line_size); in ft_fixup_l2cache()
281 fdt_setprop_cell(blob, off, "cache-size", size); in ft_fixup_l2cache()
282 fdt_setprop_cell(blob, off, "cache-sets", num_sets); in ft_fixup_l2cache()
283 fdt_setprop_cell(blob, off, "cache-level", 2); in ft_fixup_l2cache()
289 static inline void ft_fixup_l2cache(void *blob) in ft_fixup_l2cache() argument
312 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_l2cache()
315 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0); in ft_fixup_l2cache()
322 l2_off = fdt_node_offset_by_phandle(blob, *ph); in ft_fixup_l2cache()
330 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); in ft_fixup_l2cache()
334 fdt_setprop_cell(blob, l2_off, "cache-stash-id", in ft_fixup_l2cache()
339 fdt_setprop_cell(blob, l2_off, "cache-stash-id", in ft_fixup_l2cache()
345 fdt_setprop(blob, l2_off, "cache-unified", NULL, 0); in ft_fixup_l2cache()
346 fdt_setprop_cell(blob, l2_off, "cache-block-size", in ft_fixup_l2cache()
348 fdt_setprop_cell(blob, l2_off, "cache-size", size); in ft_fixup_l2cache()
349 fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets); in ft_fixup_l2cache()
350 fdt_setprop_cell(blob, l2_off, "cache-level", 2); in ft_fixup_l2cache()
351 ft_fixup_l2cache_compatible(blob, l2_off); in ft_fixup_l2cache()
355 ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0); in ft_fixup_l2cache()
364 off = fdt_node_offset_by_prop_value(blob, off, in ft_fixup_l2cache()
368 l3_off = fdt_node_offset_by_phandle(blob, l3_off); in ft_fixup_l2cache()
373 ft_fixup_l3cache(blob, l3_off); in ft_fixup_l2cache()
380 static inline void ft_fixup_cache(void *blob) in ft_fixup_cache() argument
384 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_cache()
398 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size); in ft_fixup_cache()
399 fdt_setprop_cell(blob, off, "d-cache-size", dsize); in ft_fixup_cache()
400 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets); in ft_fixup_cache()
404 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0); in ft_fixup_cache()
406 fdt_setprop_cell(blob, off, "cache-stash-id", in ft_fixup_cache()
417 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size); in ft_fixup_cache()
418 fdt_setprop_cell(blob, off, "i-cache-size", isize); in ft_fixup_cache()
419 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets); in ft_fixup_cache()
421 off = fdt_node_offset_by_prop_value(blob, off, in ft_fixup_cache()
425 ft_fixup_l2cache(blob); in ft_fixup_cache()
443 static void ft_fixup_clks(void *blob, const char *compat, u32 offset, in ft_fixup_clks() argument
447 int off = fdt_node_offset_by_compat_reg(blob, compat, phys); in ft_fixup_clks()
450 off = fdt_setprop_cell(blob, off, "clock-frequency", freq); in ft_fixup_clks()
458 static void ft_fixup_dpaa_clks(void *blob) in ft_fixup_dpaa_clks() argument
464 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET, in ft_fixup_dpaa_clks()
468 ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET, in ft_fixup_dpaa_clks()
474 do_fixup_by_compat_u32(blob, "fsl,qman", in ft_fixup_dpaa_clks()
479 do_fixup_by_compat_u32(blob, "fsl,pme", in ft_fixup_dpaa_clks()
488 static void ft_fixup_qe_snum(void *blob) in ft_fixup_qe_snum() argument
495 do_fixup_by_compat_u32(blob, "fsl,qe", in ft_fixup_qe_snum()
498 do_fixup_by_compat_u32(blob, "fsl,qe", in ft_fixup_qe_snum()
527 void fdt_fixup_dma3(void *blob) argument
554 nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,elo3-dma",
557 fdt_status_disabled(blob, nodeoff);
570 static void fdt_fixup_l2_switch(void *blob) argument
577 node = fdt_node_offset_by_compatible(blob, -1, "vitesse-9953");
589 fdt_setprop(blob, node, "local-mac-address", l2swaddr,
596 void ft_cpu_setup(void *blob, bd_t *bd) argument
605 fdt_fixup_crypto_node(blob, 0);
611 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
615 fdt_add_enet_stashing(blob);
620 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
623 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
626 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
628 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", &len);
630 fdt_setprop(blob, off, "clock-frequency", &val, 4);
631 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
634 do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
638 ft_qe_setup(blob);
639 ft_fixup_qe_snum(blob);
643 fdt_fixup_fman_firmware(blob);
647 do_fixup_by_compat_u32(blob, "ns16550",
652 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
655 do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
660 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
662 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0",
664 do_fixup_by_compat_u32(blob, "fsl,mpic",
667 do_fixup_by_compat_u32(blob, "fsl,mpic",
671 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
674 ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
675 ft_fixup_num_cores(blob);
678 ft_fixup_cache(blob);
681 fdt_fixup_esdhc(blob, bd);
684 ft_fixup_dpaa_clks(blob);
687 fdt_portal(blob, "fsl,bman-portal", "bman-portals",
690 fdt_fixup_bportals(blob);
694 fdt_portal(blob, "fsl,qman-portal", "qman-portals",
698 fdt_fixup_qportals(blob);
702 ft_srio_setup(blob);
711 do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
719 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
722 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
725 do_fixup_by_compat_u32(blob, "fsl,p1010-flexcan",
728 fdt_fixup_usb(blob);
730 fdt_fixup_l2_switch(blob);
732 fdt_fixup_dma3(blob);
844 void fdt_del_diu(void *blob) argument
848 while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
850 fdt_del_node(blob, nodeoff);