Lines Matching +full:p1010 +full:- +full:flexcan
2 * Copyright 2007-2011 Freescale Semiconductor, Inc.
7 * SPDX-License-Identifier: GPL-2.0+
48 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_cpu()
49 while (off != -FDT_ERR_NOTFOUND) { in ft_fixup_cpu()
67 enable_method = "fsl,brr-holdoff"; in ft_fixup_cpu()
70 enable_method = "fsl,eebpcr-holdoff"; in ft_fixup_cpu()
73 /* Cores out of reset and in a spin-loop */ in ft_fixup_cpu()
74 enable_method = "spin-table"; in ft_fixup_cpu()
76 fdt_setprop(blob, off, "cpu-release-addr", in ft_fixup_cpu()
80 fdt_setprop_string(blob, off, "enable-method", in ft_fixup_cpu()
163 u32 cfg0 = in_be32(&cpc->cpccfg0); in ft_fixup_l3cache()
170 fdt_setprop(blob, off, "cache-unified", NULL, 0); in ft_fixup_l3cache()
171 fdt_setprop_cell(blob, off, "cache-block-size", line_size); in ft_fixup_l3cache()
172 fdt_setprop_cell(blob, off, "cache-size", size); in ft_fixup_l3cache()
173 fdt_setprop_cell(blob, off, "cache-sets", num_sets); in ft_fixup_l3cache()
174 fdt_setprop_cell(blob, off, "cache-level", 3); in ft_fixup_l3cache()
176 fdt_setprop_cell(blob, off, "cache-stash-id", 1); in ft_fixup_l3cache()
194 if (isdigit(cpu->name[0])) { in ft_fixup_l2cache_compatible()
195 /* MPCxxxx, where xxxx == 4-digit number */ in ft_fixup_l2cache_compatible()
196 len = sprintf(buf, "fsl,mpc%s-l2-cache-controller", in ft_fixup_l2cache_compatible()
197 cpu->name) + 1; in ft_fixup_l2cache_compatible()
199 /* Pxxxx or Txxxx, where xxxx == 4-digit number */ in ft_fixup_l2cache_compatible()
200 len = sprintf(buf, "fsl,%c%s-l2-cache-controller", in ft_fixup_l2cache_compatible()
201 tolower(cpu->name[0]), cpu->name + 1) + 1; in ft_fixup_l2cache_compatible()
221 volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3; in l2cache_size()
259 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_l2cache()
265 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0); in ft_fixup_l2cache()
268 debug("no next-level-cache property\n"); in ft_fixup_l2cache()
279 fdt_setprop(blob, off, "cache-unified", NULL, 0); in ft_fixup_l2cache()
280 fdt_setprop_cell(blob, off, "cache-block-size", line_size); in ft_fixup_l2cache()
281 fdt_setprop_cell(blob, off, "cache-size", size); in ft_fixup_l2cache()
282 fdt_setprop_cell(blob, off, "cache-sets", num_sets); in ft_fixup_l2cache()
283 fdt_setprop_cell(blob, off, "cache-level", 2); in ft_fixup_l2cache()
291 int off, l2_off, l3_off = -1; in ft_fixup_l2cache()
298 u32 l2cfg0 = in_be32(&l2cache->l2cfg0); in ft_fixup_l2cache()
312 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_l2cache()
314 while (off != -FDT_ERR_NOTFOUND) { in ft_fixup_l2cache()
315 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0); in ft_fixup_l2cache()
318 debug("no next-level-cache property\n"); in ft_fixup_l2cache()
334 fdt_setprop_cell(blob, l2_off, "cache-stash-id", in ft_fixup_l2cache()
339 fdt_setprop_cell(blob, l2_off, "cache-stash-id", in ft_fixup_l2cache()
345 fdt_setprop(blob, l2_off, "cache-unified", NULL, 0); in ft_fixup_l2cache()
346 fdt_setprop_cell(blob, l2_off, "cache-block-size", in ft_fixup_l2cache()
348 fdt_setprop_cell(blob, l2_off, "cache-size", size); in ft_fixup_l2cache()
349 fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets); in ft_fixup_l2cache()
350 fdt_setprop_cell(blob, l2_off, "cache-level", 2); in ft_fixup_l2cache()
355 ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0); in ft_fixup_l2cache()
358 debug("no next-level-cache property\n"); in ft_fixup_l2cache()
384 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); in ft_fixup_cache()
386 while (off != -FDT_ERR_NOTFOUND) { in ft_fixup_cache()
392 /* d-side config */ in ft_fixup_cache()
398 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size); in ft_fixup_cache()
399 fdt_setprop_cell(blob, off, "d-cache-size", dsize); in ft_fixup_cache()
400 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets); in ft_fixup_cache()
406 fdt_setprop_cell(blob, off, "cache-stash-id", in ft_fixup_cache()
411 /* i-side config */ in ft_fixup_cache()
417 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size); in ft_fixup_cache()
418 fdt_setprop_cell(blob, off, "i-cache-size", isize); in ft_fixup_cache()
419 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets); in ft_fixup_cache()
431 do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1); in fdt_add_enet_stashing()
433 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1); in fdt_add_enet_stashing()
435 do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1); in fdt_add_enet_stashing()
436 do_fixup_by_compat(fdt, "fsl,etsec2", "bd-stash", NULL, 0, 1); in fdt_add_enet_stashing()
437 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-len", 96, 1); in fdt_add_enet_stashing()
438 do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-idx", 0, 1); in fdt_add_enet_stashing()
450 off = fdt_setprop_cell(blob, off, "clock-frequency", freq); in ft_fixup_clks()
452 printf("WARNING enable to set clock-frequency " in ft_fixup_clks()
475 "clock-frequency", sysinfo.freq_qman, 1); in ft_fixup_dpaa_clks()
480 "clock-frequency", sysinfo.freq_pme, 1); in ft_fixup_dpaa_clks()
496 "fsl,qe-num-snums", 46, 1); in ft_fixup_qe_snum()
499 "fsl,qe-num-snums", 76, 1); in ft_fixup_qe_snum()
508 u32 rcwsr11 = in_be32(&gur->rcwsr[11]); in fdt_fixup_usb()
511 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph"); in fdt_fixup_usb()
516 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr"); in fdt_fixup_usb()
535 u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
544 u32 srds_prtcl_s4 = in_be32(&gur->rcwsr[4]) &
554 nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,elo3-dma",
575 /* The l2switch node from device-tree has
576 * compatible string "vitesse-9953" */
577 node = fdt_node_offset_by_compatible(blob, -1, "vitesse-9953");
578 if (node == -FDT_ERR_NOTFOUND)
589 fdt_setprop(blob, node, "local-mac-address", l2swaddr,
603 /* delete crypto node if not on an E-processor */
611 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
621 "timebase-frequency", get_tbclk() / CONFIG_FSL_TBCLK_EXTRA_DIV,
624 "bus-frequency", bd->bi_busfreq, 1);
626 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
627 while (off != -FDT_ERR_NOTFOUND) {
630 fdt_setprop(blob, off, "clock-frequency", &val, 4);
635 "bus-frequency", bd->bi_busfreq, 1);
648 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
652 do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
653 "current-speed", gd->baudrate, 1);
655 do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
656 "clock-frequency", bd->bi_brgfreq, 1);
660 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
661 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
662 do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0",
663 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
665 "clock-frequency", get_bus_freq(0)/2, 1);
668 "clock-frequency", get_bus_freq(0), 1);
671 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
674 ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
687 fdt_portal(blob, "fsl,bman-portal", "bman-portals",
694 fdt_portal(blob, "fsl,qman-portal", "qman-portals",
706 * system-clock = CCB clock/2
707 * Here gd->bus_clk = CCB clock
711 do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
712 "timer-frequency", gd->bus_clk/2, 1);
715 * clock-freq should change to clock-frequency and
716 * flexcan-v1.0 should change to p1010-flexcan respectively
719 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
720 "clock_freq", gd->bus_clk/2, 1);
722 do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
723 "clock-frequency", gd->bus_clk/2, 1);
725 do_fixup_by_compat_u32(blob, "fsl,p1010-flexcan",
726 "clock-frequency", gd->bus_clk/2, 1);
744 (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR))
748 printf("Warning: U-Boot configured %s at address %llx,\n"
760 * that with the physical address of the first ns16550-compatible node
772 off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4);
797 * Check some nodes via aliases. We assume that U-Boot and the device
799 * U-Boot is the same as "serial0" in the device tree.
826 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,elbc");