Lines Matching refs:r3
111 mfmsr r3
112 andi. r0, r3, (MSR_IR | MSR_DR)
114 andc r3, r3, r0
116 mtspr SRR1, r3
122 stfd 1, 0(r3)
127 lfd 1, 0(r3)
174 lis r3, CONFIG_SYS_IMMR@h
175 ori r3, r3, CONFIG_SYS_IMMR@l
180 stw r3, IMMRBAR(r4)
184 lwz r6, IMMRBAR(r3)
196 1: lwz r6, 0x50b0(r3)
253 lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
254 ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
257 addi r4, r3, GENERATED_GBL_DATA_SIZE
264 cmplw r3, r4
274 subi r3, r3, CONFIG_VAL(SYS_MALLOC_F_LEN)
277 stw r3, GD_MALLOC_BASE(r4)
280 stwu r0, -4(r3) /* clear final stack frame so that */
281 stwu r0, -4(r3) /* stack backtraces terminate cleanly */
284 mr r1, r3
294 lis r3, CONFIG_SYS_IMMR@h
299 li r3, 0 /* clear boot_flag for calling board_init_f */
334 addi r3,r1,STACK_FRAME_OVERHEAD
341 addi r3,r1,STACK_FRAME_OVERHEAD
491 li r3, MSR_KERNEL /* Set ME and RI flags */
492 rlwimi r3, r5, 0, 25, 25 /* preserve IP bit set by HRCW */
494 rlwimi r3, r5, 0, 21, 22 /* debugger might set SE & BE bits */
497 mtmsr r3
499 mtspr SRR1, r3 /* Make SRR1 match MSR */
502 lis r3, CONFIG_SYS_IMMR@h
508 stw r4, SWCRR(r3)
513 sth r4, SWSRR@l(r3)
515 sth r4, SWSRR@l(r3)
519 lwz r4, SWCRR(r3)
525 stw r4, SWCRR(r3)
535 lwz r4, 0x0808(r3)
537 stw r0, 0x0808(r3)
545 lis r3, CONFIG_SYS_HID0_INIT@h
546 ori r3, r3, (CONFIG_SYS_HID0_INIT | HID0_ICFI | HID0_DCFI)@l
548 mtspr HID0, r3
550 lis r3, CONFIG_SYS_HID0_FINAL@h
551 ori r3, r3, (CONFIG_SYS_HID0_FINAL & ~(HID0_ICFI | HID0_DCFI))@l
553 mtspr HID0, r3
555 lis r3, CONFIG_SYS_HID2@h
556 ori r3, r3, CONFIG_SYS_HID2@l
558 mtspr HID2, r3
572 addis r3, r0, CONFIG_SYS_IBAT0U@h
573 ori r3, r3, CONFIG_SYS_IBAT0U@l
575 mtspr IBAT0U, r3
580 addis r3, r0, CONFIG_SYS_DBAT0U@h
581 ori r3, r3, CONFIG_SYS_DBAT0U@l
583 mtspr DBAT0U, r3
588 addis r3, r0, CONFIG_SYS_IBAT1U@h
589 ori r3, r3, CONFIG_SYS_IBAT1U@l
591 mtspr IBAT1U, r3
596 addis r3, r0, CONFIG_SYS_DBAT1U@h
597 ori r3, r3, CONFIG_SYS_DBAT1U@l
599 mtspr DBAT1U, r3
604 addis r3, r0, CONFIG_SYS_IBAT2U@h
605 ori r3, r3, CONFIG_SYS_IBAT2U@l
607 mtspr IBAT2U, r3
612 addis r3, r0, CONFIG_SYS_DBAT2U@h
613 ori r3, r3, CONFIG_SYS_DBAT2U@l
615 mtspr DBAT2U, r3
620 addis r3, r0, CONFIG_SYS_IBAT3U@h
621 ori r3, r3, CONFIG_SYS_IBAT3U@l
623 mtspr IBAT3U, r3
628 addis r3, r0, CONFIG_SYS_DBAT3U@h
629 ori r3, r3, CONFIG_SYS_DBAT3U@l
631 mtspr DBAT3U, r3
637 addis r3, r0, CONFIG_SYS_IBAT4U@h
638 ori r3, r3, CONFIG_SYS_IBAT4U@l
640 mtspr IBAT4U, r3
645 addis r3, r0, CONFIG_SYS_DBAT4U@h
646 ori r3, r3, CONFIG_SYS_DBAT4U@l
648 mtspr DBAT4U, r3
653 addis r3, r0, CONFIG_SYS_IBAT5U@h
654 ori r3, r3, CONFIG_SYS_IBAT5U@l
656 mtspr IBAT5U, r3
661 addis r3, r0, CONFIG_SYS_DBAT5U@h
662 ori r3, r3, CONFIG_SYS_DBAT5U@l
664 mtspr DBAT5U, r3
669 addis r3, r0, CONFIG_SYS_IBAT6U@h
670 ori r3, r3, CONFIG_SYS_IBAT6U@l
672 mtspr IBAT6U, r3
677 addis r3, r0, CONFIG_SYS_DBAT6U@h
678 ori r3, r3, CONFIG_SYS_DBAT6U@l
680 mtspr DBAT6U, r3
685 addis r3, r0, CONFIG_SYS_IBAT7U@h
686 ori r3, r3, CONFIG_SYS_IBAT7U@l
688 mtspr IBAT7U, r3
693 addis r3, r0, CONFIG_SYS_DBAT7U@h
694 ori r3, r3, CONFIG_SYS_DBAT7U@l
696 mtspr DBAT7U, r3
720 lis r3, 0
724 tlbie r3
725 addi r3, r3, 0x1000
726 cmp 0, 0, r3, r5
739 mfspr r3, HID0
740 ori r3, r3, HID0_ICE
742 andc r3, r3, r4
743 ori r4, r3, HID0_ICFI
747 mtspr HID0, r3 /* clears invalidate */
752 mfspr r3, HID0
755 andc r3, r3, r4
757 mtspr HID0, r3 /* clears invalidate, enable and lock */
762 mfspr r3, HID0
763 rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
769 mfspr r3, HID0
771 andc r3, r3, r5
772 ori r3, r3, HID0_DCE
774 mtspr HID0, r3 /* enable, no invalidate */
781 mfspr r3, HID0
783 andc r3, r3, r5
784 ori r5, r3, HID0_DCFI
788 mtspr HID0, r3 /* clears invalidate */
794 mfspr r3, HID0
795 rlwinm r3, r3, (31 - HID0_DCE_SHIFT + 1), 31, 31
800 lis r3, 0
802 1: cmp 0, 1, r3, r5
804 lwz r5, 0(r3)
806 addi r3, r3, 0x4
825 mr r1, r3 /* Set new stack pointer */
830 mr r3, r5 /* Destination Address */
856 cmplw cr1,r3,r4
864 la r7,-4(r3)
875 la r7,-4(r3)
886 30: li r3, 0
891 add r7,r3,r0
901 add r5,r3,r5
904 andc r3,r3,r0
905 mr r4,r3
911 mr r4,r3
936 la r3,GOT(_GOT2_TABLE_)
939 sub r11,r3,r11
940 addi r3,r3,-4
941 1: lwzu r0,4(r3)
945 stw r0,0(r3)
954 lwz r3,GOT(_FIXUP_TABLE_)
957 addi r3,r3,-4
959 3: lwzu r4,4(r3)
963 stw r4,0(r3)
974 lwz r3,GOT(__bss_start)
977 cmplw 0, r3, r4
982 stw r0, 0(r3)
983 addi r3, r3, 4
984 cmplw 0, r3, r4
988 mr r3, r9 /* Global Data pointer */
1051 mfmsr r3 /* now that the vectors have */
1054 andc r3, r3, r7 /* (if it was on) */
1056 mtmsr r3
1068 lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
1069 ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
1074 dcbz r0, r3
1075 addi r3, r3, 32
1090 lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
1091 ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
1095 1: icbi r0, r3
1096 dcbi r0, r3
1097 addi r3, r3, 32
1103 mfspr r3, HID0
1105 andc r3, r3, r5 /* no invalidate, unlock */
1106 ori r5, r3, HID0_DCFI /* invalidate, unlock */
1110 mtspr HID0, r3 /* no invalidate, unlock */
1120 lis r3, (CONFIG_SYS_IMMR)@h /* r3 <= CONFIG_SYS_IMMR */
1121 lwz r4, OR0@l(r3)
1124 stw r4, OR0@l(r3) /* OR0 <= OR0 & 0x00007FFFF */
1144 stw r4, LBLAWBAR1(r3) /* LBLAWBAR1 <= CONFIG_SYS_FLASH_BASE */
1154 stw r4, LBLAWAR1(r3) /* LBLAWAR1 <= 8MB Flash Size */
1156 lwz r4, LBLAWAR1(r3)
1167 lwz r4, BR0(r3)
1173 stw r5, BR0(r3) /* r5 <= (CONFIG_SYS_FLASH_BASE & 0xFFFF8000) | (BR0 & 0x00007FFF) */
1175 lwz r4, OR0(r3)
1178 stw r4, OR0(r3)
1182 stw r4, LBLAWBAR0(r3) /* LBLAWBAR0 <= CONFIG_SYS_FLASH_BASE */
1191 stw r4, LBLAWAR0(r3) /* LBLAWAR0 <= Flash Size */
1195 stw r4, LBLAWBAR1(r3)
1196 stw r4, LBLAWAR1(r3) /* Off LBIU LAW1 */
1198 lwz r4, LBLAWAR1(r3)