2  * Copyright (C) 2007-2011 Freescale Semiconductor, Inc.
7  * SPDX-License-Identifier:	GPL-2.0+
19 	struct ccsr_ddr __iomem *ddr = &immap->ddr;  in ecc_print_status()
21 	ddr83xx_t *ddr = &immap->ddr;  in ecc_print_status()
25 	       (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF");  in ecc_print_status()
29 	printf("  Multiple-Bit Error Interrupt Enable: %d\n",  in ecc_print_status()
30 	       (ddr->err_int_en & ECC_ERR_INT_EN_MBEE) ? 1 : 0);  in ecc_print_status()
31 	printf("  Single-Bit Error Interrupt Enable: %d\n",  in ecc_print_status()
32 	       (ddr->err_int_en & ECC_ERR_INT_EN_SBEE) ? 1 : 0);  in ecc_print_status()
34 	       (ddr->err_int_en & ECC_ERR_INT_EN_MSEE) ? 1 : 0);  in ecc_print_status()
38 	printf("  Multiple-Bit Error Disable: %d\n",  in ecc_print_status()
39 	       (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0);  in ecc_print_status()
40 	printf("  Single-Bit Error Disable: %d\n",  in ecc_print_status()
41 	       (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0);  in ecc_print_status()
43 	       (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0);  in ecc_print_status()
46 	printf("Memory Data Path Error Injection Mask High/Low: %08x %08x\n",  in ecc_print_status()
47 	       ddr->data_err_inject_hi, ddr->data_err_inject_lo);  in ecc_print_status()
49 	printf("Memory Data Path Error Injection Mask ECC:\n");  in ecc_print_status()
50 	printf("  ECC Mirror Byte: %d\n",  in ecc_print_status()
51 	       (ddr->ecc_err_inject & ECC_ERR_INJECT_EMB) ? 1 : 0);  in ecc_print_status()
53 	       (ddr->ecc_err_inject & ECC_ERR_INJECT_EIEN) ? 1 : 0);  in ecc_print_status()
55 	       ddr->ecc_err_inject & ECC_ERR_INJECT_EEIM);  in ecc_print_status()
58 	printf("Memory Single-Bit Error Management (0..255):\n");  in ecc_print_status()
59 	printf("  Single-Bit Error Threshold: %d\n",  in ecc_print_status()
60 	       (ddr->err_sbe & ECC_ERROR_MAN_SBET) >> ECC_ERROR_MAN_SBET_SHIFT);  in ecc_print_status()
61 	printf("  Single-Bit Error Counter: %d\n\n",  in ecc_print_status()
62 	       (ddr->err_sbe & ECC_ERROR_MAN_SBEC) >> ECC_ERROR_MAN_SBEC_SHIFT);  in ecc_print_status()
67 	       (ddr->err_detect & ECC_ERROR_DETECT_MME) ? 1 : 0);  in ecc_print_status()
68 	printf("  Multiple-Bit Error: %d\n",  in ecc_print_status()
69 	       (ddr->err_detect & ECC_ERROR_DETECT_MBE) ? 1 : 0);  in ecc_print_status()
70 	printf("  Single-Bit Error: %d\n",  in ecc_print_status()
71 	       (ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0);  in ecc_print_status()
73 	       (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0);  in ecc_print_status()
75 	/* Capture data */  in ecc_print_status()
76 	printf("Memory Error Address Capture: 0x%08x\n", ddr->capture_address);  in ecc_print_status()
77 	printf("Memory Data Path Read Capture High/Low: %08x %08x\n",  in ecc_print_status()
78 	       ddr->capture_data_hi, ddr->capture_data_lo);  in ecc_print_status()
79 	printf("Memory Data Path Read Capture ECC: 0x%02x\n\n",  in ecc_print_status()
80 	       ddr->capture_ecc & CAPTURE_ECC_ECE);  in ecc_print_status()
83 	printf(" Data Beat Number: %d\n",  in ecc_print_status()
84 	       (ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >>  in ecc_print_status()
87 	       (ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >>  in ecc_print_status()
90 	       (ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >>  in ecc_print_status()
93 	       (ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >>  in ecc_print_status()
96 	       ddr->capture_attributes & ECC_CAPT_ATTR_VLD);  in ecc_print_status()
103 	struct ccsr_ddr __iomem *ddr = &immap->ddr;  in do_ecc()
105 	ddr83xx_t *ddr = &immap->ddr;  in do_ecc()
119 	/* After injecting error, re-initialize the memory with the value */  in do_ecc()
131 			ddr->capture_address = 0;  in do_ecc()
132 			ddr->capture_data_hi = 0;  in do_ecc()
133 			ddr->capture_data_lo = 0;  in do_ecc()
134 			ddr->capture_ecc = 0;  in do_ecc()
135 			ddr->capture_attributes = 0;  in do_ecc()
149 			val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET);  in do_ecc()
151 			ddr->err_sbe = val;  in do_ecc()
162 			val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC);  in do_ecc()
164 			ddr->err_sbe = val;  in do_ecc()
167 			val = ddr->err_disable;  in do_ecc()
179 			} else if (strcmp(argv[2], "-sbe") == 0) {  in do_ecc()
181 			} else if (strcmp(argv[2], "-mbe") == 0) {  in do_ecc()
183 			} else if (strcmp(argv[2], "-mse") == 0) {  in do_ecc()
185 			} else if (strcmp(argv[2], "-all") == 0) {  in do_ecc()
194 			ddr->err_disable = val;  in do_ecc()
199 			val = ddr->err_detect;  in do_ecc()
219 			ddr->err_detect = val;  in do_ecc()
224 			ddr->data_err_inject_hi = val;  in do_ecc()
229 			ddr->data_err_inject_lo = val;  in do_ecc()
238 			val |= (ddr->ecc_err_inject & ~ECC_ERR_INJECT_EEIM);  in do_ecc()
240 			ddr->ecc_err_inject = val;  in do_ecc()
243 			val = ddr->ecc_err_inject;  in do_ecc()
252 			ddr->ecc_err_inject = val;  in do_ecc()
256 		} else if (strcmp(argv[1], "mirror") == 0) {  in do_ecc()
257 			val = ddr->ecc_err_inject;  in do_ecc()
266 			ddr->ecc_err_inject = val;  in do_ecc()
285 				ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;  in do_ecc()
294 				ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;  in do_ecc()
298 				/* read data, this generates ECC error */  in do_ecc()
302 				/* re-initialize memory, double word write the location again,  in do_ecc()
324 				ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;  in do_ecc()
333 				 * bus will read-modify-write,  in do_ecc()
339 				ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;  in do_ecc()
343 				/* re-initialize memory,  in do_ecc()
358 	   "status              - print out status info\n"
359 	   "ecc captureclear        - clear capture regs data\n"
360 	   "ecc sbecnt <val>        - set Single-Bit Error counter\n"
361 	   "ecc sbethr <val>        - set Single-Bit Threshold\n"
362 	   "ecc errdisable <flag>   - clear/set disable Memory Error Disable, flag:\n"
363 	   "  [-|+]sbe - Single-Bit Error\n"
364 	   "  [-|+]mbe - Multiple-Bit Error\n"
365 	   "  [-|+]mse - Memory Select Error\n"
366 	   "  [-|+]all - all errors\n"
367 	   "ecc errdetectclr <flag> - clear Memory Error Detect, flag:\n"
368 	   "  mme - Multiple Memory Errors\n"
369 	   "  sbe - Single-Bit Error\n"
370 	   "  mbe - Multiple-Bit Error\n"
371 	   "  mse - Memory Select Error\n"
372 	   "  all - all errors\n"
373 	   "ecc injectdatahi <hi>  - set Memory Data Path Error Injection Mask High\n"
374 	   "ecc injectdatalo <lo>  - set Memory Data Path Error Injection Mask Low\n"
375 	   "ecc injectecc <ecc>    - set ECC Error Injection Mask\n"
376 	   "ecc inject <en|dis>    - enable/disable error injection\n"
377 	   "ecc mirror <en|dis>    - enable/disable mirror byte\n"
378 	   "ecc testdw <addr> <cnt>  - test mem region with double word access:\n"
379 	   "  - enables injects\n"
380 	   "  - writes pattern injecting errors with double word access\n"
381 	   "  - disables injects\n"
382 	   "  - reads pattern back with double word access, generates error\n"
383 	   "  - re-inits memory\n"
384 	   "ecc testword <addr> <cnt>  - test mem region with word access:\n"
385 	   "  - enables injects\n"
386 	   "  - writes pattern injecting errors with word access\n"
387 	   "  - writes pattern with word access, generates error\n"
388 	   "  - disables injects\n" "  - re-inits memory");