Lines Matching +full:0 +full:x00000020
19 #size-cells = <0>;
21 cpu: cpu@0x0 {
24 reg = <0x00000000>;
39 altr,reset-addr = <0xc2800000>;
40 altr,fast-tlb-miss-addr = <0xc7fff400>;
41 altr,exception-addr = <0xd0000020>;
47 memory@0 {
49 reg = <0x10000000 0x08000000>,
50 <0x07fff400 0x00000400>;
53 sopc@0 {
61 pb_cpu_to_io: bridge@0x8000000 {
63 reg = <0x08000000 0x00800000>;
66 ranges = <0x00002000 0x08002000 0x00002000>,
67 <0x00004000 0x08004000 0x00000400>,
68 <0x00004400 0x08004400 0x00000040>,
69 <0x00004800 0x08004800 0x00000040>,
70 <0x00004c80 0x08004c80 0x00000020>,
71 <0x00004cc0 0x08004cc0 0x00000010>,
72 <0x00004ce0 0x08004ce0 0x00000010>,
73 <0x00004d00 0x08004d00 0x00000010>,
74 <0x00004d40 0x08004d40 0x00000008>,
75 <0x00004d50 0x08004d50 0x00000008>,
76 <0x00008000 0x08008000 0x00000020>,
77 <0x00400000 0x08400000 0x00000020>;
79 timer_1ms: timer@0x400000 {
81 reg = <0x00400000 0x00000020>;
87 timer_0: timer@0x8000 {
89 reg = < 0x00008000 0x00000020 >;
95 sysid: sysid@0x4d40 {
97 reg = <0x00004d40 0x00000008>;
100 jtag_uart: serial@0x4d50 {
102 reg = <0x00004d50 0x00000008>;
107 tse_mac: ethernet@0x4000 {
109 reg = <0x00004000 0x00000400>,
110 <0x00004400 0x00000040>,
111 <0x00004800 0x00000040>,
112 <0x00002000 0x00002000>;
126 #size-cells = <0>;
134 uart: serial@0x4c80 {
136 reg = <0x00004c80 0x00000020>;
143 user_led_pio_8out: gpio@0x4cc0 {
145 reg = <0x00004cc0 0x00000010>;
153 user_dipsw_pio_8in: gpio@0x4ce0 {
155 reg = <0x00004ce0 0x00000010>;
159 level_trigger = <0>;
160 resetvalue = <0>;
167 user_pb_pio_4in: gpio@0x4d00 {
169 reg = <0x00004d00 0x00000010>;
173 level_trigger = <0>;
174 resetvalue = <0>;
182 cfi_flash_64m: flash@0x0 {
184 reg = <0x00000000 0x04000000>;
191 reg = <0x00800000 0x01e00000>;