76 	void __iomem *rregs = map_physmem(AR71XX_RESET_BASE, AR71XX_RESET_SIZE,  in eth_init_ar933x()  local
88 	clrbits_be32(rregs + AR933X_RESET_REG_BOOTSTRAP, BIT(17));  in eth_init_ar933x()
96 	setbits_be32(rregs + AR933X_RESET_REG_RESET_MODULE, mask);  in eth_init_ar933x()
98 	clrbits_be32(rregs + AR933X_RESET_REG_RESET_MODULE, mask);  in eth_init_ar933x()
111 	void __iomem *rregs = map_physmem(AR71XX_RESET_BASE, AR71XX_RESET_SIZE,  in eth_init_ar934x()  local
122 	reg = readl(rregs + AR934X_RESET_REG_BOOTSTRAP);  in eth_init_ar934x()
129 	setbits_be32(rregs + AR934X_RESET_REG_RESET_MODULE, mask);  in eth_init_ar934x()
131 	clrbits_be32(rregs + AR934X_RESET_REG_RESET_MODULE, mask);  in eth_init_ar934x()
141 	void __iomem *rregs = map_physmem(AR71XX_RESET_BASE, AR71XX_RESET_SIZE,  in eth_init_qca953x()  local
148 	setbits_be32(rregs + AR934X_RESET_REG_RESET_MODULE, mask);  in eth_init_qca953x()
150 	clrbits_be32(rregs + AR934X_RESET_REG_RESET_MODULE, mask);  in eth_init_qca953x()