110 	const struct ar934x_pll_config *pll_cfg;  in ar934x_pll_init()  local
143 		pll_cfg = &ar934x_clock_config[i].cpu_pll;  in ar934x_pll_init()
144 		pll_nint = pll_cfg->nint[xtal_40];  in ar934x_pll_init()
145 		pll_refdiv = pll_cfg->refdiv;  in ar934x_pll_init()
149 			(pll_cfg->range << AR934X_PLL_CPU_CONFIG_RANGE_SHIFT) |  in ar934x_pll_init()
150 			(pll_cfg->outdiv << AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT);  in ar934x_pll_init()
152 		pll_cfg = &ar934x_clock_config[i].ddr_pll;  in ar934x_pll_init()
153 		pll_nint = pll_cfg->nint[xtal_40];  in ar934x_pll_init()
154 		pll_refdiv = pll_cfg->refdiv;  in ar934x_pll_init()
158 			(pll_cfg->range << AR934X_PLL_DDR_CONFIG_RANGE_SHIFT) |  in ar934x_pll_init()
159 			(pll_cfg->outdiv << AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT);  in ar934x_pll_init()