mips/dts/brcm%2Cbcm6358.dtsi

4  * SPDX-License-Identifier:	GPL-2.0+
7 #include <dt-bindings/clock/bcm6358-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/reset/bcm6358-reset.h>
17 		#address-cells = <1>;
18 		#size-cells = <0>;
19 		u-boot,dm-pre-reloc;
22 			compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
25 			u-boot,dm-pre-reloc;
29 			compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
32 			u-boot,dm-pre-reloc;
37 		compatible = "simple-bus";
38 		#address-cells = <1>;
39 		#size-cells = <1>;
40 		u-boot,dm-pre-reloc;
42 		periph_osc: periph-osc {
43 			compatible = "fixed-clock";
44 			#clock-cells = <0>;
45 			clock-frequency = <50000000>;
46 			u-boot,dm-pre-reloc;
49 		periph_clk: periph-clk {
50 			compatible = "brcm,bcm6345-clk";
52 			#clock-cells = <1>;
57 		compatible = "cfi-flash";
59 		bank-width = <2>;
60 		#address-cells = <1>;
61 		#size-cells = <1>;
67 		compatible = "simple-bus";
68 		#address-cells = <1>;
69 		#size-cells = <1>;
70 		u-boot,dm-pre-reloc;
72 		pll_cntl: syscon@fffe0008 {
73 			compatible = "syscon";
77 		syscon-reboot {
78 			compatible = "syscon-reboot";
84 		periph_rst: reset-controller@fffe0034 {
85 			compatible = "brcm,bcm6345-reset";
87 			#reset-cells = <1>;
91 			compatible = "brcm,bcm6345-wdt";
96 		wdt-reboot {
97 			compatible = "wdt-reboot";
101 		gpio1: gpio-controller@fffe0080 {
102 			compatible = "brcm,bcm6345-gpio";
104 			gpio-controller;
105 			#gpio-cells = <2>;
111 		gpio0: gpio-controller@fffe0084 {
112 			compatible = "brcm,bcm6345-gpio";
114 			gpio-controller;
115 			#gpio-cells = <2>;
120 		leds: led-controller@fffe00d0 {
121 			compatible = "brcm,bcm6358-leds";
123 			#address-cells = <1>;
124 			#size-cells = <0>;
130 			compatible = "brcm,bcm6345-uart";
138 			compatible = "brcm,bcm6345-uart";
145 		memory-controller@fffe1200 {
146 			compatible = "brcm,bcm6358-mc";
148 			u-boot,dm-pre-reloc;