Lines Matching refs:r6
51 addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
53 swi r6, r0, 0x28 /* used first unused MB vector */
66 addik r6, r0, CONFIG_SYS_RESET_ADDRESS
67 sw r6, r1, r0
72 sh r6, r0, r8
80 addik r6, r0, _exception_handler
81 sw r6, r1, r0
106 sh r6, r0, r8
113 addik r6, r0, _interrupt_handler
114 sw r6, r1, r0
119 sh r6, r0, r8
125 addik r6, r0, _hw_exception_handler
126 sw r6, r1, r0
131 sh r6, r0, r8
136 addik r6, r0, XILINX_DCACHE_BYTE_SIZE
150 cmp r6, r5, r4
151 beqi r6, 3f
155 cmp r6, r5, r4 /* check if we have reach the end */
156 bnei r6, 2b
166 addi r6, r0, CONFIG_SYS_INIT_SP_OFFSET
167 swi r6, r31, GD_MALLOC_BASE
173 addi r6, r0, CONFIG_SPL_STACK_ADDR
174 swi r6, r31, GD_MALLOC_BASE
210 out16: bslli r3, r6, 8
211 bsrli r6, r6, 8
213 or r3, r3, r6
233 addi r31, r6, 0 /* Start to use new GD */
240 rsub r6, r21, r22
244 cmp r12, r5, r6 /* Check if we have reach the end */
253 addik r6, r0, 0x2 /* BIG/LITTLE endian offset */
255 swi r6, r0, 0x28 /* used first unused MB vector */
260 addik r6, r0, _exception_handler
261 addk r6, r6, r23 /* add offset */
262 sw r6, r1, r0
267 sh r6, r0, r8
269 addik r6, r0, _hw_exception_handler
270 addk r6, r6, r23 /* add offset */
271 sw r6, r1, r0
276 sh r6, r0, r8
278 addik r6, r0, _interrupt_handler
279 addk r6, r6, r23 /* add offset */
280 sw r6, r1, r0
285 sh r6, r0, r8
312 addik r6, r0, XILINX_DCACHE_BYTE_SIZE
317 addi r6, r0, CONFIG_SYS_TEXT_BASE