Lines Matching refs:gpio
79 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cpu_init_f() local
90 out_8(&gpio->par_fbctl, in cpu_init_f()
94 out_8(&gpio->par_be, in cpu_init_f()
143 out_8(&gpio->par_cani2c, 0xF0); in cpu_init_f()
145 out_be16(&gpio->pcr_b, 0x003C); in cpu_init_f()
147 out_8(&gpio->srcr_cani2c, 0x03); in cpu_init_f()
151 out_8(&gpio->par_ssi0h, 0xA0); in cpu_init_f()
153 out_8(&gpio->par_ssi0h, 0xA8); in cpu_init_f()
155 out_8(&gpio->par_ssi0l, 0x2); in cpu_init_f()
157 out_8(&gpio->par_cani2c, 0xAA); in cpu_init_f()
159 out_8(&gpio->par_uart0, 0xAF); in cpu_init_f()
161 out_8(&gpio->par_uart1, 0xAF); in cpu_init_f()
163 out_8(&gpio->par_uart2, 0xAF); in cpu_init_f()
165 out_be16(&gpio->pcr_h, 0xF000); in cpu_init_f()
169 out_8(&gpio->par_uart1, 0x0A); in cpu_init_f()
171 out_be16(&gpio->pcr_e, 0x0003); in cpu_init_f()
172 out_be16(&gpio->pcr_f, 0xC000); in cpu_init_f()
176 out_8(&gpio->srcr_uart, 0x00); in cpu_init_f()
192 out_8(&gpio->par_be, in cpu_init_f()
195 out_8(&gpio->par_fbctl, in cpu_init_f()
200 out_be16(&gpio->par_feci2c, in cpu_init_f()
239 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in uart_port_conf() local
250 clrbits_8(&gpio->par_uart0, in uart_port_conf()
252 setbits_8(&gpio->par_uart0, in uart_port_conf()
258 clrbits_8(&gpio->par_uart1, in uart_port_conf()
260 setbits_8(&gpio->par_uart1, in uart_port_conf()
266 clrbits_8(&gpio->par_uart2, in uart_port_conf()
268 setbits_8(&gpio->par_uart2, in uart_port_conf()
274 clrbits_8(&gpio->par_dspi0, in uart_port_conf()
276 setbits_8(&gpio->par_dspi0, in uart_port_conf()
282 clrbits_8(&gpio->par_uart0, in uart_port_conf()
284 setbits_8(&gpio->par_uart0, in uart_port_conf()
290 clrbits_8(&gpio->par_uart1, in uart_port_conf()
292 setbits_8(&gpio->par_uart1, in uart_port_conf()
298 clrbits_8(&gpio->par_uart2, in uart_port_conf()
300 setbits_8(&gpio->par_uart2, in uart_port_conf()
306 clrbits_8(&gpio->par_ssi0h, ~GPIO_PAR_SSI0H_RXD_MASK); in uart_port_conf()
307 clrbits_8(&gpio->par_ssi0l, ~GPIO_PAR_SSI0L_BCLK_MASK); in uart_port_conf()
308 setbits_8(&gpio->par_ssi0h, GPIO_PAR_SSI0H_FS_U7TXD); in uart_port_conf()
309 setbits_8(&gpio->par_ssi0l, GPIO_PAR_SSI0L_BCLK_U7RXD); in uart_port_conf()
314 clrbits_8(&gpio->par_cani2c, in uart_port_conf()
316 setbits_8(&gpio->par_cani2c, in uart_port_conf()
322 clrbits_8(&gpio->par_cani2c, in uart_port_conf()
324 setbits_8(&gpio->par_cani2c, in uart_port_conf()
330 clrbits_8(&gpio->par_uart, in uart_port_conf()
332 setbits_8(&gpio->par_uart, in uart_port_conf()
337 clrbits_8(&gpio->par_uart, in uart_port_conf()
339 setbits_8(&gpio->par_uart, in uart_port_conf()
342 clrbits_be16(&gpio->par_ssi, in uart_port_conf()
344 setbits_be16(&gpio->par_ssi, in uart_port_conf()
350 clrbits_8(&gpio->par_timer, in uart_port_conf()
352 setbits_8(&gpio->par_timer, in uart_port_conf()
355 clrbits_8(&gpio->par_timer, in uart_port_conf()
357 setbits_8(&gpio->par_timer, in uart_port_conf()
368 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in fecpin_setclear() local
375 setbits_be16(&gpio->par_feci2c, in fecpin_setclear()
379 setbits_be16(&gpio->par_feci2c, in fecpin_setclear()
383 setbits_be16(&gpio->par_feci2c, in fecpin_setclear()
388 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_RMII_GPIO); in fecpin_setclear()
390 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC1_RMII_ATA); in fecpin_setclear()
392 clrbits_be16(&gpio->par_feci2c, in fecpin_setclear()
397 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_MII); in fecpin_setclear()
399 clrbits_8(&gpio->par_fec, ~GPIO_PAR_FEC_FEC0_UNMASK); in fecpin_setclear()
403 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC1_MII); in fecpin_setclear()
405 clrbits_8(&gpio->par_fec, ~GPIO_PAR_FEC_FEC1_UNMASK); in fecpin_setclear()
413 out_8(&gpio->par_fec, 0x03); in fecpin_setclear()
414 out_8(&gpio->srcr_fec, 0x0F); in fecpin_setclear()
415 clrsetbits_8(&gpio->par_simp0h, ~GPIO_PAR_SIMP0H_DAT_MASK, in fecpin_setclear()
417 clrsetbits_8(&gpio->pddr_g, ~GPIO_PDDR_G4_MASK, in fecpin_setclear()
419 clrbits_8(&gpio->podr_g, ~GPIO_PODR_G4_MASK); in fecpin_setclear()
422 clrbits_8(&gpio->par_fec, ~GPIO_PAR_FEC_FEC_MASK); in fecpin_setclear()
431 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cfspi_port_conf() local
434 out_8(&gpio->par_dspi, in cfspi_port_conf()
443 out_8(&gpio->par_dspi0, in cfspi_port_conf()
446 out_8(&gpio->srcr_dspiow, 3); in cfspi_port_conf()
456 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cfspi_claim_bus() local
467 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); in cfspi_claim_bus()
468 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); in cfspi_claim_bus()
471 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); in cfspi_claim_bus()
472 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); in cfspi_claim_bus()
475 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); in cfspi_claim_bus()
476 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); in cfspi_claim_bus()
479 clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK); in cfspi_claim_bus()
480 setbits_8(&gpio->par_dma, GPIO_PAR_DMA_DACK0_PCS3); in cfspi_claim_bus()
483 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5); in cfspi_claim_bus()
484 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5); in cfspi_claim_bus()
492 clrbits_8(&gpio->par_dspi0, ~GPIO_PAR_DSPI0_PCS0_MASK); in cfspi_claim_bus()
493 setbits_8(&gpio->par_dspi0, GPIO_PAR_DSPI0_PCS0_DSPI0PCS0); in cfspi_claim_bus()
496 clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); in cfspi_claim_bus()
497 setbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); in cfspi_claim_bus()
508 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cfspi_release_bus() local
516 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); in cfspi_release_bus()
519 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); in cfspi_release_bus()
522 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); in cfspi_release_bus()
525 clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK); in cfspi_release_bus()
528 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5); in cfspi_release_bus()
535 clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); in cfspi_release_bus()