Lines Matching full:r1
25 ldr r1, [r0]
26 and r1, r1, #SG_REVISION_TYPE_MASK
27 mov r1, r1, lsr #SG_REVISION_TYPE_SHIFT
31 cmp r1, #0x26
35 ldr r1, [r0]
36 orr r1, r1, #1
37 str r1, [r0]
39 sg_set_pinsel 88, 1, 8, 4, r0, r1 @ HSDOUT6 -> TXD0
48 cmp r1, #0x28
51 sg_set_pinsel 128, 0, 4, 8, r0, r1 @ TXD0 -> TXD0
54 mov r1, #1
55 str r1, [r0]
58 ldr r1, [r0]
59 orr r1, r1, #SC_CLKCTRL_CEN_PERI
60 str r1, [r0]
69 cmp r1, #0x29
73 ldr r1, [r0]
74 orr r1, r1, #1
75 str r1, [r0]
77 sg_set_pinsel 70, 3, 8, 4, r0, r1 @ HSDOUT0 -> TXD0
86 cmp r1, #0x2A
89 sg_set_pinsel 47, 0, 4, 8, r0, r1 @ TXD0 -> TXD0
90 sg_set_pinsel 49, 0, 4, 8, r0, r1 @ TXD1 -> TXD1
91 sg_set_pinsel 51, 0, 4, 8, r0, r1 @ TXD2 -> TXD2
92 sg_set_pinsel 53, 0, 4, 8, r0, r1 @ TXD3 -> TXD3
95 mov r1, #1
96 str r1, [r0]
99 ldr r1, [r0]
100 orr r1, r1, #SC_CLKCTRL_CEN_PERI
101 str r1, [r0]
110 cmp r1, #0x2E
114 ldr r1, [r0]
115 orr r1, r1, #1
116 str r1, [r0]
118 sg_set_pinsel 217, 8, 8, 4, r0, r1 @ TXD0 -> TXD0
119 sg_set_pinsel 115, 8, 8, 4, r0, r1 @ TXD1 -> TXD1
120 sg_set_pinsel 113, 8, 8, 4, r0, r1 @ TXD2 -> TXD2
121 sg_set_pinsel 219, 8, 8, 4, r0, r1 @ TXD3 -> TXD3
124 ldr r1, [r0]
125 orr r1, r1, #SC_CLKCTRL_CEN_PERI
126 str r1, [r0]
135 cmp r1, #0x2F
139 ldr r1, [r0]
140 orr r1, r1, #1
141 str r1, [r0]
143 sg_set_pinsel 135, 3, 8, 4, r0, r1 @ PORT10 -> TXD0
144 sg_set_pinsel 115, 0, 8, 4, r0, r1 @ TXD1 -> TXD1
145 sg_set_pinsel 113, 2, 8, 4, r0, r1 @ SBO0 -> TXD2
148 ldr r1, [r0]
149 orr r1, r1, #SC_CLKCTRL_CEN_PERI
150 str r1, [r0]
160 addruart r0, r1, r2
161 mov r1, #UART_LCR_WLEN8 << 8
162 str r1, [r0, #0x10]