Lines Matching +full:xusb +full:- +full:padctl

2  * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
4 * SPDX-License-Identifier: GPL-2.0
7 #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt
12 #include "xusb-padctl-common.h"
18 if (phy && phy->ops && phy->ops->prepare) in tegra_xusb_phy_prepare()
19 return phy->ops->prepare(phy); in tegra_xusb_phy_prepare()
21 return phy ? -ENOSYS : -EINVAL; in tegra_xusb_phy_prepare()
26 if (phy && phy->ops && phy->ops->enable) in tegra_xusb_phy_enable()
27 return phy->ops->enable(phy); in tegra_xusb_phy_enable()
29 return phy ? -ENOSYS : -EINVAL; in tegra_xusb_phy_enable()
34 if (phy && phy->ops && phy->ops->disable) in tegra_xusb_phy_disable()
35 return phy->ops->disable(phy); in tegra_xusb_phy_disable()
37 return phy ? -ENOSYS : -EINVAL; in tegra_xusb_phy_disable()
42 if (phy && phy->ops && phy->ops->unprepare) in tegra_xusb_phy_unprepare()
43 return phy->ops->unprepare(phy); in tegra_xusb_phy_unprepare()
45 return phy ? -ENOSYS : -EINVAL; in tegra_xusb_phy_unprepare()
53 for (i = 0; i < padctl.socdata->num_phys; i++) { in tegra_xusb_phy_get()
54 phy = &padctl.socdata->phys[i]; in tegra_xusb_phy_get()
55 if (phy->type != type) in tegra_xusb_phy_get()
64 tegra_xusb_padctl_find_lane(struct tegra_xusb_padctl *padctl, const char *name) in tegra_xusb_padctl_find_lane() argument
68 for (i = 0; i < padctl->socdata->num_lanes; i++) in tegra_xusb_padctl_find_lane()
69 if (strcmp(name, padctl->socdata->lanes[i].name) == 0) in tegra_xusb_padctl_find_lane()
70 return &padctl->socdata->lanes[i]; in tegra_xusb_padctl_find_lane()
76 tegra_xusb_padctl_group_parse_dt(struct tegra_xusb_padctl *padctl, in tegra_xusb_padctl_group_parse_dt() argument
83 group->name = ofnode_get_name(node); in tegra_xusb_padctl_group_parse_dt()
88 return -EINVAL; in tegra_xusb_padctl_group_parse_dt()
91 group->num_pins = len; in tegra_xusb_padctl_group_parse_dt()
93 for (i = 0; i < group->num_pins; i++) { in tegra_xusb_padctl_group_parse_dt()
95 &group->pins[i]); in tegra_xusb_padctl_group_parse_dt()
98 return -EINVAL; in tegra_xusb_padctl_group_parse_dt()
102 group->num_pins = len; in tegra_xusb_padctl_group_parse_dt()
105 &group->func); in tegra_xusb_padctl_group_parse_dt()
108 return -EINVAL; in tegra_xusb_padctl_group_parse_dt()
111 group->iddq = ofnode_read_u32_default(node, "nvidia,iddq", -1); in tegra_xusb_padctl_group_parse_dt()
116 static int tegra_xusb_padctl_find_function(struct tegra_xusb_padctl *padctl, in tegra_xusb_padctl_find_function() argument
121 for (i = 0; i < padctl->socdata->num_functions; i++) in tegra_xusb_padctl_find_function()
122 if (strcmp(name, padctl->socdata->functions[i]) == 0) in tegra_xusb_padctl_find_function()
125 return -ENOENT; in tegra_xusb_padctl_find_function()
129 tegra_xusb_padctl_lane_find_function(struct tegra_xusb_padctl *padctl, in tegra_xusb_padctl_lane_find_function() argument
136 func = tegra_xusb_padctl_find_function(padctl, name); in tegra_xusb_padctl_lane_find_function()
140 for (i = 0; i < lane->num_funcs; i++) in tegra_xusb_padctl_lane_find_function()
141 if (lane->funcs[i] == func) in tegra_xusb_padctl_lane_find_function()
144 return -ENOENT; in tegra_xusb_padctl_lane_find_function()
148 tegra_xusb_padctl_group_apply(struct tegra_xusb_padctl *padctl, in tegra_xusb_padctl_group_apply() argument
153 for (i = 0; i < group->num_pins; i++) { in tegra_xusb_padctl_group_apply()
158 lane = tegra_xusb_padctl_find_lane(padctl, group->pins[i]); in tegra_xusb_padctl_group_apply()
160 pr_err("no lane for pin %s", group->pins[i]); in tegra_xusb_padctl_group_apply()
164 func = tegra_xusb_padctl_lane_find_function(padctl, lane, in tegra_xusb_padctl_group_apply()
165 group->func); in tegra_xusb_padctl_group_apply()
168 group->func, lane->name, func); in tegra_xusb_padctl_group_apply()
172 value = padctl_readl(padctl, lane->offset); in tegra_xusb_padctl_group_apply()
175 value &= ~(lane->mask << lane->shift); in tegra_xusb_padctl_group_apply()
176 value |= func << lane->shift; in tegra_xusb_padctl_group_apply()
182 if (lane->iddq > 0 && group->iddq >= 0) { in tegra_xusb_padctl_group_apply()
183 if (group->iddq != 0) in tegra_xusb_padctl_group_apply()
184 value &= ~(1 << lane->iddq); in tegra_xusb_padctl_group_apply()
186 value |= 1 << lane->iddq; in tegra_xusb_padctl_group_apply()
189 padctl_writel(padctl, value, lane->offset); in tegra_xusb_padctl_group_apply()
196 tegra_xusb_padctl_config_apply(struct tegra_xusb_padctl *padctl, in tegra_xusb_padctl_config_apply() argument
201 for (i = 0; i < config->num_groups; i++) { in tegra_xusb_padctl_config_apply()
205 group = &config->groups[i]; in tegra_xusb_padctl_config_apply()
207 err = tegra_xusb_padctl_group_apply(padctl, group); in tegra_xusb_padctl_config_apply()
210 group->name, err); in tegra_xusb_padctl_config_apply()
219 tegra_xusb_padctl_config_parse_dt(struct tegra_xusb_padctl *padctl, in tegra_xusb_padctl_config_parse_dt() argument
225 config->name = ofnode_get_name(node); in tegra_xusb_padctl_config_parse_dt()
231 group = &config->groups[config->num_groups]; in tegra_xusb_padctl_config_parse_dt()
233 err = tegra_xusb_padctl_group_parse_dt(padctl, group, subnode); in tegra_xusb_padctl_config_parse_dt()
235 pr_err("failed to parse group %s", group->name); in tegra_xusb_padctl_config_parse_dt()
239 config->num_groups++; in tegra_xusb_padctl_config_parse_dt()
245 static int tegra_xusb_padctl_parse_dt(struct tegra_xusb_padctl *padctl, in tegra_xusb_padctl_parse_dt() argument
251 err = ofnode_read_resource(node, 0, &padctl->regs); in tegra_xusb_padctl_parse_dt()
258 struct tegra_xusb_padctl_config *config = &padctl->config; in tegra_xusb_padctl_parse_dt()
261 err = tegra_xusb_padctl_config_parse_dt(padctl, config, in tegra_xusb_padctl_parse_dt()
265 config->name, err); in tegra_xusb_padctl_parse_dt()
274 struct tegra_xusb_padctl padctl; variable
288 padctl.socdata = socdata; in tegra_xusb_process_nodes()
290 err = tegra_xusb_padctl_parse_dt(&padctl, nodes[i]); in tegra_xusb_process_nodes()
296 /* deassert XUSB padctl reset */ in tegra_xusb_process_nodes()
299 err = tegra_xusb_padctl_config_apply(&padctl, &padctl.config); in tegra_xusb_process_nodes()