Lines Matching full:padctl

7 #define pr_fmt(fmt) "tegra-xusb-padctl: " fmt
14 #include "../xusb-padctl-common.h"
97 static int tegra_xusb_padctl_enable(struct tegra_xusb_padctl *padctl) in tegra_xusb_padctl_enable() argument
101 if (padctl->enable++ > 0) in tegra_xusb_padctl_enable()
104 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_enable()
106 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_enable()
110 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_enable()
112 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_enable()
116 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_enable()
118 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_enable()
123 static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl) in tegra_xusb_padctl_disable() argument
127 if (padctl->enable == 0) { in tegra_xusb_padctl_disable()
132 if (--padctl->enable > 0) in tegra_xusb_padctl_disable()
135 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_disable()
137 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_disable()
141 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_disable()
143 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_disable()
147 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_disable()
149 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_disable()
158 err = tegra_xusb_padctl_enable(phy->padctl); in phy_prepare()
171 return tegra_xusb_padctl_disable(phy->padctl); in phy_unprepare()
218 struct tegra_xusb_padctl *padctl = phy->padctl; in pcie_phy_enable() local
224 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
227 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
229 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in pcie_phy_enable()
232 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in pcie_phy_enable()
234 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
236 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
238 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
240 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
242 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
244 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
246 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL4); in pcie_phy_enable()
251 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL4); in pcie_phy_enable()
253 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
257 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
259 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
261 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
263 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
265 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
269 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL4); in pcie_phy_enable()
271 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL4); in pcie_phy_enable()
273 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
275 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
282 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
292 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
294 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
301 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
311 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
313 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
319 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
329 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
332 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
338 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
348 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
350 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
356 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
366 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
368 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
377 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
379 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
381 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
383 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
385 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
387 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
415 .padctl = &padctl,
437 "nvidia,tegra210-xusb-padctl"); in tegra_xusb_padctl_init()
448 count = fdtdec_find_aliases_for_id(gd->fdt_blob, "padctl", in tegra_xusb_padctl_init()