79 struct emc_ctlr *emc_get_controller(const void *blob)  in emc_get_controller()  argument
84 	node = fdtdec_next_compatible(blob, 0, COMPAT_NVIDIA_TEGRA20_EMC);  in emc_get_controller()
86 		addr = fdtdec_get_addr(blob, node, "reg");  in emc_get_controller()
118 static int find_emc_tables(const void *blob, int node, int ram_code)  in find_emc_tables()  argument
125 	need_ram_code = fdtdec_get_bool(blob, node, "nvidia,use-ram-code");  in find_emc_tables()
140 		offset = fdt_next_node(blob, offset, &depth);  in find_emc_tables()
147 		if (strcmp("emc-tables", fdt_get_name(blob, offset, NULL)))  in find_emc_tables()
150 		if (fdtdec_get_int(blob, offset, "nvidia,ram-code", -1)  in find_emc_tables()
173 static int decode_emc(const void *blob, unsigned rate, struct emc_ctlr **emcp,  in decode_emc()  argument
190 	node = fdtdec_next_compatible(blob, 0, COMPAT_NVIDIA_TEGRA20_EMC);  in decode_emc()
195 	*emcp = (struct emc_ctlr *)fdtdec_get_addr(blob, node, "reg");  in decode_emc()
202 	node = find_emc_tables(blob, node, ram_code & 3);  in decode_emc()
210 		node = fdtdec_next_compatible_subnode(blob, node,  in decode_emc()
214 		node_rate = fdtdec_get_int(blob, node, "clock-frequency", -1);  in decode_emc()
229 	*tablep = fdtdec_locate_array(blob, node, "nvidia,emc-registers",  in decode_emc()
233 		      fdt_get_name(blob, node, NULL));  in decode_emc()
241 int tegra_set_emc(const void *blob, unsigned rate)  in tegra_set_emc()  argument
247 	err = decode_emc(blob, rate, &emc, &table);  in tegra_set_emc()