mach-tegra/tegra20/emc.c

4  * SPDX-License-Identifier:	GPL-2.0+
10 #include <asm/arch-tegra/ap.h>
11 #include <asm/arch-tegra/apb_misc.h>
95 	ERR_NO_EMC_NODE = -10,
105  * Find EMC tables for the given ram code.
107  * The tegra EMC binding has two options, one using the ram code and one not.
108  * We detect which is in use by looking for the nvidia,use-ram-code property.
110  * otherwise we select the correct emc-tables subnode based on the 'ram_code'
114  * @param node		EMC node (nvidia,tegra20-emc compatible string)
115  * @param ram_code	RAM code to select (0-3, or -1 if unknown)
116  * @return 0 if ok, otherwise a -ve ERR_ code (see enum above)
124 	/* If we are using RAM codes, scan through the tables for our code */  in find_emc_tables()
125 	need_ram_code = fdtdec_get_bool(blob, node, "nvidia,use-ram-code");  in find_emc_tables()
128 	if (ram_code == -1) {  in find_emc_tables()
129 		debug("%s: RAM code required but not supplied\n", __func__);  in find_emc_tables()
147 		if (strcmp("emc-tables", fdt_get_name(blob, offset, NULL)))  in find_emc_tables()
150 		if (fdtdec_get_int(blob, offset, "nvidia,ram-code", -1)  in find_emc_tables()
155 	debug("%s: Could not find tables for RAM code %d\n", __func__,  in find_emc_tables()
170  * @return 0 if ok, otherwise a -ve error code which will allow someone to
171  * figure out roughly what went wrong by looking at this code.
182 	ram_code = (readl(&pp->strapping_opt_a) & RAM_CODE_MASK)  in decode_emc()
214 		node_rate = fdtdec_get_int(blob, node, "clock-frequency", -1);  in decode_emc()
215 		if (node_rate == -1) {  in decode_emc()
216 			debug("%s: Missing clock-frequency\n", __func__);  in decode_emc()
229 	*tablep = fdtdec_locate_array(blob, node, "nvidia,emc-registers",  in decode_emc()