arm/mach-tegra/board.c

2  *  (C) Copyright 2010-2015
5  * SPDX-License-Identifier:	GPL-2.0+
17 #include <asm/arch-tegra/ap.h>
18 #include <asm/arch-tegra/board.h>
19 #include <asm/arch-tegra/pmc.h>
20 #include <asm/arch-tegra/sys_proto.h>
21 #include <asm/arch-tegra/warmboot.h>
59 	 * This register reads 0xffffffff in non-secure mode. This register  in tegra_cpu_is_non_secure()
62 	 * non-secure mode.  in tegra_cpu_is_non_secure()
65 	uint32_t mc_s_cfg0 = readl(&mc->mc_security_cfg0);  in tegra_cpu_is_non_secure()
77 	emem_cfg = readl(&mc->mc_emem_cfg);  in query_sdram_size()
79 	debug("mc->mc_emem_cfg (MEM_SIZE_KB) = 0x%08x\n", emem_cfg);  in query_sdram_size()
82 	debug("mc->mc_emem_cfg (MEM_SIZE_MB) = 0x%08x\n", emem_cfg);  in query_sdram_size()
85 	 * If >=4GB RAM is present, the byte RAM size won't fit into 32-bits  in query_sdram_size()
86 	 * and will wrap. Clip the reported size to the maximum that a 32-bit  in query_sdram_size()
90 		size_bytes = U32_MAX & ~(0x1000 - 1);  in query_sdram_size()
94 		/* RAM size EMC is programmed to. */  in query_sdram_size()
98 		 * If all RAM fits within 32-bits, it can be accessed without  in query_sdram_size()
104 		if (emem_cfg <= (0 - PHYS_SDRAM_1) / (1024 * 1024))  in query_sdram_size()
112 	/* External memory limited to 2047 MB due to IROM/HI-VEC */  in query_sdram_size()
114 		size_bytes -= SZ_1M;  in query_sdram_size()
123 	gd->ram_size = query_sdram_size();  in dram_init()
139 	-1,
141 	-1,
144 	-1,
145 	-1,
146 	-1,
147 	-1,
149 	-1,
150 	-1,
151 	-1,
153 	-1,
156 	-1,
157 	-1,
159 	-1,
160 #else	/* Tegra210 */
162 	-1,
163 	-1,
165 	-1,
233 	/* Enable D-cache. I-cache is already enabled in start.S */  in enable_caches()