arm/mach-sunxi/p2wi.c

2  * Sunxi A31 Power Management Unit
5  * http://linux-sunxi.org
7  * Based on sun6i sources and earlier U-Boot Allwiner A10 SPL work
9  * (C) Copyright 2006-2013
14  * SPDX-License-Identifier:	GPL-2.0+
23 #include <asm/arch/prcm.h>
31 	/* Enable p2wi and PIO clk, and de-assert their resets */  in p2wi_init()
38 	writel(P2WI_CTRL_RESET, &p2wi->ctrl);  in p2wi_init()
41 	       &p2wi->cc);  in p2wi_init()
53 	       &p2wi->pm);  in p2wi_change_to_p2wi_mode()
55 	while ((readl(&p2wi->pm) & P2WI_PM_INIT_SEND)) {  in p2wi_change_to_p2wi_mode()
57 			return -ETIME;  in p2wi_change_to_p2wi_mode()
71 		reg = readl(&p2wi->status);  in p2wi_await_trans()
73 			ret = -EIO;  in p2wi_await_trans()
81 			ret = -ETIME;  in p2wi_await_trans()
85 	writel(reg, &p2wi->status); /* Clear status bits */  in p2wi_await_trans()
94 	writel(P2WI_DATADDR_BYTE_1(addr), &p2wi->dataddr0);  in p2wi_read()
96 	       P2WI_DATA_NUM_BYTES_READ, &p2wi->numbytes);  in p2wi_read()
97 	writel(P2WI_STAT_TRANS_DONE, &p2wi->status);  in p2wi_read()
98 	writel(P2WI_CTRL_TRANS_START, &p2wi->ctrl);  in p2wi_read()
102 	*data = readl(&p2wi->data0) & P2WI_DATA_BYTE_1_MASK;  in p2wi_read()
110 	writel(P2WI_DATADDR_BYTE_1(addr), &p2wi->dataddr0);  in p2wi_write()
111 	writel(P2WI_DATA_BYTE_1(data), &p2wi->data0);  in p2wi_write()
112 	writel(P2WI_DATA_NUM_BYTES(1), &p2wi->numbytes);  in p2wi_write()
113 	writel(P2WI_STAT_TRANS_DONE, &p2wi->status);  in p2wi_write()
114 	writel(P2WI_CTRL_TRANS_START, &p2wi->ctrl);  in p2wi_write()