122 	MBUS_CONF(   GPU,  true,    HIGH, 0, 1536, 1024,  256);  in mctl_set_master_priority_h3()
125 	MBUS_CONF(    VE,  true,    HIGH, 0, 1792, 1600,  256);  in mctl_set_master_priority_h3()
127 	MBUS_CONF(  NAND,  true,    HIGH, 0,  256,  128,   64);  in mctl_set_master_priority_h3()
130 	MBUS_CONF(    DI,  true,    HIGH, 0, 1024,  256,   64);  in mctl_set_master_priority_h3()
132 	MBUS_CONF(DE_CFD,  true,    HIGH, 0, 1024,  288,   64);  in mctl_set_master_priority_h3()
147 	MBUS_CONF(   GPU, false,    HIGH, 0, 1536, 1400,  256);  in mctl_set_master_priority_a64()
149 	MBUS_CONF(   DMA,  true,    HIGH, 0,  256,   80,  100);  in mctl_set_master_priority_a64()
150 	MBUS_CONF(    VE,  true,    HIGH, 0, 1792, 1600,  256);  in mctl_set_master_priority_a64()
151 	MBUS_CONF(   CSI,  true,    HIGH, 0,  256,  128,    0);  in mctl_set_master_priority_a64()
152 	MBUS_CONF(  NAND,  true,    HIGH, 0,  256,  128,   64);  in mctl_set_master_priority_a64()
155 	MBUS_CONF(    DI,  true,    HIGH, 0, 1024,  256,   64);  in mctl_set_master_priority_a64()
156 	MBUS_CONF(    DE,  true,    HIGH, 2, 8192, 6144, 2048);  in mctl_set_master_priority_a64()
157 	MBUS_CONF(DE_CFD,  true,    HIGH, 0, 1280,  144,   64);  in mctl_set_master_priority_a64()
182 	MBUS_CONF(  NAND, true,    HIGH, 0,  256,  128,   64);  in mctl_set_master_priority_h5()
185 	MBUS_CONF(    DI, true,    HIGH, 0, 1024,  256,   64);  in mctl_set_master_priority_h5()
210 	MBUS_CONF(    NAND, true,    HIGH, 0,  256,  128,   64);  in mctl_set_master_priority_r40()
213 	MBUS_CONF(      DI, true,    HIGH, 0, 1024,  256,   64);  in mctl_set_master_priority_r40()
219 	MBUS_CONF(      DE, true,    HIGH, 0,  128,   48,    0);  in mctl_set_master_priority_r40()
220 	MBUS_CONF(  DE_CFD, true,    HIGH, 0,  384,  256,    0);  in mctl_set_master_priority_r40()
223 	MBUS_CONF(UNKNOWN3, true,    HIGH, 0, 1280,  144,   64);  in mctl_set_master_priority_r40()